參數(shù)資料
型號(hào): MCM67Q909
廠商: Motorola, Inc.
英文描述: 512Kx9 Bit Synchronous Fast Static RAM(512Kx9位同步快速靜態(tài)RAM)
中文描述: 512Kx9位同步快速靜態(tài)存儲(chǔ)器(512Kx9位同步快速靜態(tài)內(nèi)存)
文件頁數(shù): 5/12頁
文件大?。?/td> 91K
代理商: MCM67Q909
MCM67Q909
5
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
5%, TA = 0 to 70
°
C, Unless Otherwise Noted)
Input Timing Measurement Reference Level
Input Pulse Levels
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Rise/Fall Time
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . .
0 to 3.0 V
3 ns
Output Timing Reference Level
Output Load
. . . . . . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1 Unless Otherwise Noted
READ/WRITE CYCLE TIMING
(See Notes 1, 2, 3, and 4)
MCM67Q909–10
MCM67Q909–12
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Cycle Time
tKHKH
tKHQV
tKLKH
tKHKL
tKHQX
tKHQZ
tAVKH
tWVKH
tEVKH
tGVKH
tDVKH
10
12
ns
1
Clock Access Time
5
5
ns
2
Clock Low Pulse Width
4
4
ns
Clock High Pulse Width
4
4
ns
Clock High to Data Output Invalid
2
2
ns
Clock High to Data Output High–Z
5
5
ns
3
Setup Times:
A
W
E
G
D0 – D8
3
3
ns
4
Hold Times:
A
W
E
G
D0 – D8
tKHAX
tKHWX
tKHEX
tKHGX
tKHDX
1.5
1.5
ns
4
NOTES:
1. All read and write cycles are referenced from K.
2. Valid data from clock high will be the data stored at the address or the last valid read cycle.
3. Measured at
±
200 mV from steady state.
4. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for
ALL
rising
edges of clock (K) while the device is selected.
OUTPUT
Z0 = 50
RL = 50
VL = 1.5 V
Figure 1. AC Test Load
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