參數(shù)資料
型號: MCIMX31
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 141/170頁
文件大?。?/td> 1562K
代理商: MCIMX31
Electrical Characteristics
i.MX31/i.MX31L Advance Information, Rev. 1.4
Freescale Semiconductor
141
Preliminary
Figure 78. SmartCard Interface Power Down AC Timing
4.3.21
SJC Electrical Specifications
This section details the electrical characteristics for the SJC module.
Figure 79
depicts the SJC test clock
input timing.
Figure 80
depicts the SJC boundary scan timing,
Figure 81
depicts the SJC test access port,
Figure 82
depicts the SJC TRST timing, and
Table 60
lists the SJC timing parameters.
Figure 79. Test Clock Input Timing Diagram
Table 59. Timing Requirements for Power Down Sequence
Num
Description
Symbol
Min
Max
Unit
1
SIM reset to SIM clock stop
S
rst2clk
0.9*1/FCKIL
0.8
μs
2
SIM reset to SIM TX data low
S
rst2dat
1.8*1/FCKIL
1.2
μs
3
SIM reset to SIM Voltage Enable Low
S
rst2ven
2.7*1/FCKIL
1.8
μs
4
SIM Presence Detect to SIM reset Low
S
pd2rst
0.9*1/FCKIL
25
ns
SIMPD
RST
CLK
DATA_TX
SVEN
Srst2clk
Srst2dat
Srst2ven
Spd2rst
TCK
(Input)
VM
VM
VIH
VIL
SJ1
SJ2
SJ2
SJ3
SJ3
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