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參數(shù)資料
| 型號(hào)： | MCIMX31 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Multimedia Applications Processors |
| 中文描述： | 多媒體應(yīng)用處理器 |
| 文件頁(yè)數(shù)： | 11/170頁(yè) |
| 文件大?。?/td> | 1562K |
| 代理商： | MCIMX31 |
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Functional Description and Application Information
i.MX31/i.MX31L Advance Information, Rev. 1.4
Freescale Semiconductor
11
Preliminary
2.3.7
External Memory Interface (EMI)
The EMI controls all memory accesses external to the i.MX31 and i.MX31L (read/write/erase/program)
from all the masters in the system. This is done by using two port interfaces MPG (AHB 32 bit) and
MPG64 (AHB 64 bit) toward different external memories.
The EMI includes interface elements, and controllers of external memories, as shown in the list below:
M3IF—Multi Master Memory Interface.
ESDCTL/MDDRC—Enhanced SDRAM/MDDR memory controller.
PCMCIA—PCMCIA memory controller.
NFC—NAND Flash memory controller.
WEIM—SRAM/PSRAM/FLASH memory controller.
All accesses via the EMI are arbitrated by the Multi Master Memory Interface (M3IF) and controlled by
the respective memory controller. The M3IF - ESDCTL/MDDRC interface is designed to reduce access
latency by generating multiple accesses through the dedicated ESDCTL/MDDRC arbitration (MAB)
module, which controls the access towards/from the Enhanced SDRAM/MDDR memory controller. For
the other memory interfaces (PCMCIA, NFC, WEIM), the M3IF only arbitrates and forwards the masters
requests received through the Master Port Gasket (MPG/MPG64) interface.
The M3IF - Multi Master Memory Interface
controls memory accesses (read/write/erase/program)
from one or more masters through different port interfaces toward different external memory controllers.
The masters arrive from the ARM Platform, the SDMA, the MPEG-4 encoder, or the IPU. The controllers
are: ESDCTL/MDDRC, PCMCIA, NANDFLASH and WEIM. The interface between the M3IF and the
controllers can be divided into two different types: M3IF-ESDCTL, and M3IF-all others. For the other port
interfaces, the M3IF arbitrates and forwards the masters’ requests received through the Master Port Gasket
(MPG) interfaces and the M3IF arbitration (M3A) module toward the respective memory controller.
The Enhanced SDRAM Controller
consists of 10 major blocks, including the SDRAM command state
machine controller, bank register (page and bank address comparators), Row/Column Address Multiplexer
& decoder, configuration registers, refresh request sequencer, command sequencer, size logic (splitting
access), data path (data aligner/multiplexer), MDDR interface, and the Power Down timer. Since up to two
SDRAMs can be connected to the ESDCTL, and each SDRAM has 4 banks, there are a total of 8 bank
controllers. The bank controllers can also be used as comparators for timing parameters.
The NAND Flash Controller (NFC)
interfaces standard NAND Flash devices to the i.MX31 and
i.MX31L and hides the complexities of accessing the NAND Flash. It provides a glueless interface to both
8-bits and 16-bits NAND Flash parts with page sizes of 512 Bytes or 2 Kilobytes. It addressing scheme
allows it to accesses flash devices of almost limitless capacities. The 2 kilobyte RAM buffer of the NAND
Flash is used as the boot RAM during a cold reset (if the i.MX31 and i.MX31L are configured for a boot
to be carried out from the NAND Flash device). After the boot procedure completes, the RAM is available
as buffer RAM. In addition, the NAND Flash controller provides an X16 bit and X32 bit interface to the
AHB bus on the chip side, and an X8/X16 interface to the NAND Flash device on the external side.
The Wireless External Interface Module (WEIM)
handles the interface to devices external to chip,
including generation of chip selects, clocks and controls for external peripherals and memory. It provides
asynchronous and synchronous access to devices with SRAM-like interface.The WEIM includes six chip
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相關(guān)代理商/技術(shù)參數(shù) |
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| MCIMX31_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31_08 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31_09 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Multimedia Applications Processors |
| MCIMX31ADSE | 功能描述:KIT DEV ADS I.MX31 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| MCIMX31ADSE/C | 功能描述:開發(fā)板和工具包 - ARM I.MX31 APP DEV SYS RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
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