參數(shù)資料
型號(hào): MCHRC705KJ1CPE
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 86/108頁(yè)
文件大小: 0K
描述: IC MCU 1.2K 4MHZ OTP 16-DIP
標(biāo)準(zhǔn)包裝: 25
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 10
程序存儲(chǔ)器容量: 1.2KB(1.2K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-DIP(0.300",7.62mm)
包裝: 管件
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
79
Chapter 9
Multifunction Timer Module
9.1 Introduction
The multifunction timer provides a timing reference with programmable real-time interrupt capability.
Figure 9-2 shows the timer organization.
9.2 Features
Features of the multifunction timer include:
Timer overflow
Four selectable interrupt rates
Computer operating properly (COP) watchdog timer
9.3 Operation
A 15-stage ripple counter, preceded by a prescaler that divides the internal clock signal by four, provides
the timing reference for the timer functions. The value of the first eight timer stages can be read at any
time by accessing the timer counter register at address $0009. A timer overflow function at the eighth
stage allows a timer interrupt every 1024 internal clock cycles.
The next four stages lead to the real-time interrupt (RTI) circuit. The RT1 and RT0 bits in the timer status
and control register at address $0008 allow a timer interrupt every 16,384, 32,768, 65,536, or 131,072
clock cycles. The last four stages drive the selectable COP system. For information on the COP, refer to
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0008
Timer Status and Control Register
(TSCR)
Read:
TOF
RTIF
TOIE
RTIE
00
RT1
RT0
Write:
TOFR
RTIFR
Reset:
00
0
0011
$0009
Timer Counter Register
(TCR)
Read:
TMR7
TMR6
TMR5
TMR4
TMR3
TMR2
TMR1
TMR0
Write:
Reset:
00
0
0000
= Unimplemented
Figure 9-1. I/O Register Summary
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