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參數(shù)資料
| 型號： | MCF5484CZP200 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA388 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-388 |
| 文件頁數(shù)： | 42/96頁 |
| 文件大?。?/td> | 2006K |
| 代理商： | MCF5484CZP200 |
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MOTOROLA
MCF548x Integrated Microprocessor Hardware Specifications
47
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
DesignRecommendations
1.7.7
Interface Recommendations
1.7.7.1
SDRAM Controller
The SDRAM controller has a glueless interface to both SDR and DDR memories. Since different voltages
are required for the two memory technologies, the module supports either DDR or SDR but not both.
Supported memory clock rate will be up to 133MHz. At this memory clock rate, DDR memory can receive
data at an effective rate of 266 MHz.
Support for up to 13 lines of row address, up to 12 lines of column address, 2 lines of bank address,
and up to 4 chip selects. Two memory chip selects are multiplexed with two chip selects for the
local bus.
Memory bus width fixed at 32 bits.
1.7.7.1.1
SDRAM Controller Address Configurations
The SDRAM controller supports up to 13 row addresses and up to 12 column addresses. However, the
maximum row and column addresses are not supported at the same time. The number of row and column
addresses must be less than 24. In addition to row/column address lines, there are always two row bank
address bits. Therefore, the greatest possible address space which can be accessed using a single chip select
is (226) x 32 bit, or 256 Mbytes.
Table 13 shows the address multiplexing used by the MCF548x for different configurations. When the
SDRAM controller receives the internal module enable, it latches the internal bus address lines A[27:2] and
multiplexes them into row, column and row bank addresses. A[9:2] are always used for CA[7:0], A[11:10]
are always used for BA[1:0], and A[23:12] are always used for RA[11:0]. A[27:24] can be used for
additional row or column address bits, as needed.
Table 13. SDRAM Address Multiplexing
Device
Configuration
Row bit x
Col bit x
Banks
Internal Address
27
26
25
24
23–12
11–10
9–2
64 Mbits
4M x 16 bit
12 x 8 x 4
————
RA11-0
BA1-0
CA7–0
8M x 8bits
12 x 9 x 4
—
CA8
RA11–0
BA1–0
CA7–0
13 x 8 x 4
—
RA12
RA11–0
BA1–0
CA7–0
16M x 4 bit
12 x 10 x 4
—
CA9
CA8
RA11–0
BA1–0
CA7–0
13 x 9 x 4
—
CA8
RA12
RA11–0
BA1–0
CA7–0
128 Mbits
8M x 16 bit
12 x 9 x 4
—
CA8
RA11–0
BA1–0
CA7–0
13 x 8 x 4
—
RA12
RA11–0
BA1–0
CA7–0
16M x 8 bit
12 x 10 x 4
—
CA9
CA8
RA11–0
BA1–0
CA7–0
13 x 9 x 4
—
CA8
RA12
RA11–0
BA1–0
CA7–0
32M x 4 bit
12 x 11 x 4
—
CA11
CA9
CA8
RA11–0
BA1–0
CA7–0
13 x 10 x 4
—
CA9
CA8
RA12
RA11–0
BA1–0
CA7–0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCF5485 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCF548x ColdFire㈢ Microprocessor |
| MCF5485CVR200 | 功能描述:微處理器 - MPU MCF548X V4ECORE MMU FPU RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF5485CZP200 | 功能描述:微處理器 - MPU MCF548X V4ECORE MMU FPU RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF548X | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCF548x ColdFire㈢ Microprocessor |
| MCF548X_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCF548x ColdFire㈢ Microprocessor |
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