參數(shù)資料
型號: MCF547X
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: MCF547x Integrated Microprocessor Electrical Characteristics
中文描述: MCF547x集成的微處理器,電氣特性
文件頁數(shù): 8/28頁
文件大?。?/td> 706K
代理商: MCF547X
MCF547x Integrated Microprocessor Electrical Characteristics, Rev. 2
Reset Timing Specifications
7
Reset Timing Specifications
Freescale Semiconductor
8
Table 9
lists specifications for the reset timing parameters shown in
Figure 5
Figure 5
shows reset timing for the values in
Table 9
.
Figure 5. Reset Timing
8
FlexBus
A multi-function external bus interface called FlexBus is provided on the MCF5472 with basic
functionality to interface to slave-only devices up to a maximum bus frequency of 66 MHz. It can be
directly connected to asynchronous or synchronous devices such as external boot ROMs, flash memories,
gate-array logic, or other simple target (slave) devices with little or no additional circuitry. For
asynchronous devices, a simple chip-select based interface can be used. The FlexBus interface has six
general purpose chip-selects (FBCS[5:0]). Chip-select FBCS0 can be dedicated to boot ROM access and
can be programmed to be byte (8 bits), word (16 bits), or longword (32 bits) wide. Control signal timing
is compatible with common ROM / flash memories.
Table 9. Reset Timing Specification
Num
Characteristic
66 MHz CLKIN
Units
Min
Max
R1
1
NOTES:
1
RSTI and FlexBus data lines are synchronized internally. Setup and hold
times must be met only if recognition on a particular clock is required.
Valid to CLKIN (setup)
8
nS
R2
CLKIN to invalid (hold)
1.0
nS
R3
RSTI to invalid (hold)
1.0
nS
CLKIN
R1
R3
R2
R1
RSTI
Mode Select
FlexBus
NOTE:
Mode selects are registered on the rising clock edge before
the cycle in which RSTI is recognized as being negated.
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