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參數(shù)資料
| 型號(hào)： | MCAQE16G6APP-MXA |
| 元件分類： | 存儲(chǔ)控制器/管理單元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PQFP |
| 封裝： | LQFP |
| 文件頁數(shù)： | 40/65頁 |
| 文件大?。?/td> | 799K |
| 代理商： | MCAQE16G6APP-MXA |
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NAND Flash-based Solid State Disk
45
Sep. 27. 2006
5.10.1 Address
CS1
CS0
DA2
DA1
DA0
NA
N
A
A=asserted, N=negated
5.10.6 Field / bit description
Bit 2: ABRT(command aborted) is set to one to indicate the requested command has been command aborted because the com-
mand code or a command parameter is invalid or some other error has occurred.
#: The content of this bit is command dependent
76
5
4
3
2
1
0
##
#
ABRT
#
5.10.2 Direction
This register is read only. If this address is written to by the host, the Features register is written.
5.10.3 Access Restrictions
The contents of this register shall be valid when BSY and DRQ equal zero and ERR equals one.
The contents of this register shall be valid upon completion of power-on, or after a hardware or software reset, or after command
completion of an EXECUTE DEVICE DIAGNOSTICS. The contents of this register are not valid while a devcie is in the Sleep mode.
5.10.4 Effect
None.
5.10.5 Functional description
This register contains status for the current command.
Following a power-on, a hardware or software reset, or command completion of an EXECUTE DEVICE DIAGNOSTIC, this register
contains a diagnostic code. At command description of any command except EXECUTE DEVICE DIAGNOSTIC, the contents of this
register are valid when the ERR bit is set to one in the Status Register.
5.10 Error Register
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