
MC68HC908QL4  MC68HC908QL3  MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
83
Chapter 8 
External Interrupt (IRQ)
8.1  Introduction
The IRQ (external interrupt) module provides a maskable interrupt input.
IRQ functionality is enabled by setting configuration register 2 (CONFIG2) IRQEN bit accordingly. A zero 
disables the IRQ function and IRQ will assume the other shared functionalities. A one enables the IRQ 
function. See 
Chapter 5 Configuration Register (CONFIG)
 for more information on enabling the IRQ pin.
The IRQ pin shares its pin with general-purpose input/output (I/O) port pins. See 
Figure 8-1
 for port 
location of this shared pin.
8.2  Features 
Features of the IRQ module include:
A dedicated external interrupt pin IRQ
IRQ interrupt control bits
Programmable edge-only or edge and level interrupt sensitivity
Automatic interrupt acknowledge
Internal pullup device
8.3  Functional Description
A low level applied to the external interrupt request (IRQ) pin can latch a CPU interrupt request. 
Figure 8-2
shows the structure of the IRQ module.
Interrupt signals on the IRQ pin are latched into the IRQ latch. The IRQ latch remains set until one of the 
following actions occurs:
IRQ vector fetch. An IRQ vector fetch automatically generates an interrupt acknowledge signal that 
clears the latch that caused the vector fetch.
Software clear. Software can clear the IRQ latch by writing a 1 to the ACK bit in the interrupt status 
and control register (INTSCR). 
Reset. A reset automatically clears the IRQ latch.
The external IRQ pin is falling edge sensitive out of reset and is software-configurable to be either falling 
edge or falling edge and low level sensitive. The MODE bit in INTSCR controls the triggering sensitivity 
of the IRQ pin.