參數資料
型號: MC8610TPX800GB
廠商: Freescale Semiconductor
文件頁數: 82/96頁
文件大?。?/td> 0K
描述: MPU E600 CORE 800MHZ 783-PBGA
標準包裝: 36
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 800MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,FCBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
Hardware Design Considerations
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
83
3.10
Guidelines for High-Speed Interface Termination
3.10.1
SerDes Interface
The high-speed SerDes interface can be disabled through the POR input cfg_io_ports[0:2] and through the DEVDISR register
in software. If a SerDes port is disabled through the POR input the user can not enable it through the DEVDISR register in
software. However, if a SerDes port is enabled through the POR input the user can disable it through the DEVDISR register in
software. Disabling a SerDes port through software should be done on a temporary basis. Power is always required for the
SerDes interface, even if the port is disabled through either mechanism. Table 61 describes the possible enabled/disabled
scenarios for a SerDes port. The termination recommendations must be followed for each port.
If the high-speed SerDes port requires complete or partial termination, the unused pins should be terminated as described in this
section.
The following pins must be left unconnected (floating):
SDn_TX[7:0]
The following pins must be connected to GND:
SDn_RX[7:0]
SDn_REF_CLK
SDn_REF_CLK
For other directions on reserved or no-connects pins, see Section 1, “Pin Assignments and Reset States.”
Table 61. SerDes Port Enabled/Disabled Configurations
Disabled through POR input
Enabled through POR input
Enabled through DEVDISR
SerDes port is disabled (and cannot
be enabled through DEVDISR)
Complete termination required
(Reference clock not required
SerDes port is enabled
Partial termination may be required1
(Reference clock is required)
1 Partial termination when a SerDes port is enabled through both POR input and DEVDISR is determined by the
SerDes port mode. If port 1 is in x4 PCI Express mode, no termination is required because all pins are being
used. If port 1 is in x1/x2 PCI Express mode, termination is required on the unused pins. If port 2 is in x8 PCI
Express mode, no termination is required because all pins are being used. If port 1 is in x1/x2/x4 PCI Express
mode, termination is required on the unused pins.
Disabled through DEVDISR
SerDes port is disabled (through
POR input)
Complete termination required
(Reference clock not required)
SerDes port is disabled after software
disables port
Same termination requirements as
when the port is enabled through POR
input2
(Reference clock is required)
2 If a SerDes port is enabled through the POR input and then disabled through DEVDISR, no hardware changes
are required. Termination of the SerDes port should follow what is required when the port is enabled through
both POR input and DEVDISR. See Note 1 for more information.
相關PDF資料
PDF描述
IDT7025S55JI8 IC SRAM 128KBIT 55NS 84PLCC
IDT7025S45J8 IC SRAM 128KBIT 45NS 84PLCC
IDT7025S35J8 IC SRAM 128KBIT 35NS 84PLCC
XC4036XL-3HQ240C IC FPGA C-TEMP 3.3V 3SPD 240HQFP
XC4036XL-3HQ208I IC FPGA I-TEMP 3.3V 3SPD 208HQFP
相關代理商/技術參數
參數描述
MC8610TPX800GZ 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8610 Integrated Host Processor Hardware Specifications
MC8610TPX800J 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications
MC8610TVT1066JB 功能描述:微處理器 - MPU REV 1.1 8610 1.0V -40C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MC8610TVT1066JZ 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8610 Integrated Host Processor Hardware Specifications
MC8610TVT1067G 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications