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參數(shù)資料
| 型號： | MC80C52XXX-20SHXXX |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| 封裝： | 0.600 INCH, SIDE BRAZED, DIP-40 |
| 文件頁數(shù)： | 130/134頁 |
| 文件大?。?/td> | 3805K |
| 代理商： | MC80C52XXX-20SHXXX |
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95
8068U–AVR–06/2013
XMEGA A3
Not recommended for new designs -
Use XMEGA A3U series
Problem fix/Workaround
Keep the amplified voltage output from the ADC gain stage below 2.4 V in order to get a cor-
rect result, or keep ADC voltage reference below 2.4 V.
5.
ADC Event on compare match non-functional
ADC signalling event will be given at every conversion complete even if Interrupt mode (INT-
MODE) is set to BELOW or ABOVE.
Problem fix/Workaround
Enable and use interrupt on compare match when using the compare function.
6.
Bandgap measurement with the ADC is non-functional when VCC is below 2.7V
The ADC can not be used to do bandgap measurements when VCC is below 2.7V.
Problem fix/Workaround
None.
7.
Accuracy lost on first three samples after switching input to ADC gain stage
Due to memory effect in the ADC gain stage, the first three samples after changing input
channel must be disregarded to achieve 12-bit accuracy.
Problem fix/Workaround
Run three ADC conversions and discard these results after changing input channels to ADC
gain stage.
8.
Configuration of PGM and CWCM not as described in XMEGA A Manual
Enabling Common Waveform Channel Mode will enable Pattern generation mode (PGM),
but not Common Waveform Channel Mode.
Enabling Pattern Generation Mode (PGM) and not Common Waveform Channel Mode
(CWCM) will enable both Pattern Generation Mode and Common Waveform Channel Mode.
Problem fix/Workaround
9.
PWM is not restarted properly after a fault in cycle-by-cycle mode
When the AWeX fault restore mode is set to cycle-by-cycle, the waveform output will not
return to normal operation at first update after fault condition is no longer present.
Problem fix/Workaround
Do a write to any AWeX I/O register to re-enable the output.
10. BOD will be enabled after any reset
If any reset source goes active, the BOD will be enabled and keep the device in reset if the
VCC voltage is below the programmed BOD level. During Power-On Reset, reset will not be
released until VCC is above the programmed BOD level even if the BOD is disabled.
Table 36-1.
Configure PWM and CWCM according to this table:
PGM
CWCM
Description
0
PGM and CWCM disabled
0
1
PGM enabled
1
0
PGM and CWCM enabled
1
PGM enabled
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MQ80C52CXXX-36SHXXX:D | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44 |
| MR80C52TXXX-20/883:D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MR80C52XXX-30SHXXX:R | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44 |
| MQ80C52EXXX-30 | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
| MD80C52TXXX-25/883:D | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CDIP40 |
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