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| 型號： | MC74LCX00SD |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 門電路 |
| 英文描述： | 15 A 12-V Input Bus Termination Power Module for DDR/QDR Memory 10-DIP MODULE -40 to 85 |
| 中文描述： | LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14 |
| 封裝： | PLASTIC, SSOP-14 |
| 文件頁數(shù)： | 19/40頁 |
| 文件大?。?/td> | 350K |
| 代理商： | MC74LCX00SD |
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Design Considerations
MOTOROLA
LCX DATA
BR1339 — REV 3
24
The three waveforms shown in Figure 19 through
Figure 21 depict how ground bounce is generated. The first
waveform shows the voltage (V) across the load as it is
switched from a logic HIGH to a logic LOW. The output slew
rate is dependent upon the characteristics of the output
transistor, the inductors L1 and L3, and CL, the load
capacitance. The second waveform shows the current that is
generated as the capacitor discharges [I = CL dV/dt]. The
third waveform shows the voltage that is induced across the
inductance in the ground lead due to the changing currents
[Vgb = –L (dI/dt)].
There are many factors which affect the amplitude of the
ground bounce. Included are:
Number of outputs switching simultaneously: more outputs
result in more ground bounce.
Type of output load: capacitive loads generate two to three
times more ground bounce than typical system traces.
Increasing the capacitive load to approximately 60–70 pF
increases ground bounce. Beyond 70 pF, ground bounce
drops off due to the filtering effect of the load. Moving the
load away from the output reduces the ground bounce.
Location of the output pin: outputs closer to the ground pin
exhibit less ground bounce than those further away.
Voltage: lowering VCC reduces ground bounce.
Test fixtures: standard test fixtures generate 30 to 50%
more ground bounce than a typical system since they use
capacitive loads which both increase the AC load and form
LCR tank circuits that oscillate.
Ground bounce produces several symptoms:
Altered device states. LCX does not exhibit this symptom.
Propagation delay degradation. LCX devices are
characterized not to degrade more than 200ps per
additional output switching.
Undershoot on active outputs. The worst–case undershoot
will be approximately equal to the worst–case quiet output
noise.
Quiet output noise. The LCX worst case quiet output has
been characterized to be typically 800mV. It will be much
less in well designed systems.
Observing either one of the following rules is sufficient to
avoid running into any of the problems associated with ground
bounce:
First,
use
caution
when
driving
asynchronous
TTL–level inputs from CMOS octal outputs, or
Second, use caution when running control lines (set,
reset, load, clock, chip select) which are glitch–sensitive
through the same devices that drive data or address
lines.
When it is not possible to avoid the above conditions, there
are simple precautions available which can minimize ground
bounce noise. These are:
Locate these outputs as close to the ground pin as possible.
Use the lowest VCC possible or separate the power
supplies.
Use board design practices which reduce any additive
noise sources, such as crosstalk, reflections, etc.
Design Rules
The set of design rules listed below are recommended to
ensure reliable system operation by providing the optimum
power supply connection to the devices. Most designers will
recognize these guidelines as those they have employed with
advanced bipolar logic families.
Use multi–layer boards with VCC and ground planes, with
the device power pins soldered directly to the planes to
ensure the lowest power line impedances possible.
Use decoupling capacitors for every device, usually 0. 1 F
should be adequate. These capacitors should be located as
close to the ground pin as possible.
Do not use sockets or wirewrap boards whenever possible.
Do not connect capacitors from the outputs directly to
ground.
Decoupling Requirements
Motorola’s LCX family, as with other high–performance,
high–drive logic families, has special decoupling and printed
circuit board layout requirements. Adhering to these
requirements will ensure the maximum advantages are
gained with LCX products.
Figure 22. Power Distribution Impedances
VCC
1/16
″
GLASS–EPOXY
GROUND PLANE
GND
D) 100
VCC
IMPEDANCE
GND
.032
EPOXY GLASS
E) 2.0
VCC
IMPEDANCE
VCC
1/16” BOARD
B) 100
VCC
IMPEDANCE
VCC
GND
1/16
″ BOARD
C) 68
VCC
IMPEDANCE
1/16
″ BOARD
VCC
GND
0.1
″
0.1
″
0.1
″
0.04”
A) 50
VCC
IMPEDANCE
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC74LCX02D | 功能描述:邏輯門 2-3.6V Quad 2-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74LCX02DG | 功能描述:邏輯門 2-3.6V Quad 2-Input NOR RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74LCX02DR2 | 功能描述:邏輯門 2-3.6V Quad 2-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74LCX02DR2G | 功能描述:邏輯門 2-3.6V Quad 2-Input NOR RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74LCX02DT | 功能描述:邏輯門 2-3.6V Quad 2-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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