參數(shù)資料
型號: MC74HC174AN
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Hex D Flip-Flop witth Common Clock and Reset
中文描述: HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 2/6頁
文件大?。?/td> 202K
代理商: MC74HC174AN
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
500
Storage Temperature
SOIC Package
– 65 to + 150
C
(Plastic DIP or SOIC Package)
260
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
Min
2.0
Max
6.0
Unit
V
DC Input Voltage, Output Voltage (Referenced to GND)
0
+ 125
V
Operating Temperature, All Package Types
– 55
C
Input Rise and Fall Time (Figure 1)
0
1000
ns
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Guaranteed Limit
VCC
– 55 to
6.0
4.2
4.2
4.2
VIL
Maximum Low–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
6.0
0.5
1.8
0.5
1.8
0.5
1.8
Voltage
|Iout|
20
μ
A
4.5
4.4
4.4
4.4
V
|Iout|
4.0 mA
|Iout|
5.2 mA
VOL
Maximum Low–Level Output
Vin = VIH or VIL
4.5
6.0
2.0
6.0
3.98
5.48
0.1
0.1
3.84
5.34
0.1
0.1
3.7
5.2
0.1
0.1
|Iout|
4.0 mA
4.5
0.26
0.33
0.4
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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