參數(shù)資料
型號(hào)： MC705JJ7CDWE
廠商： Freescale Semiconductor
文件頁數(shù)： 164/164頁
文件大小： 0K
描述： IC MCU 8BIT 224B RAM 20-SOIC
標(biāo)準(zhǔn)包裝： 38
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 14
程序存儲(chǔ)器容量： 6KB（6K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
包裝： 管件
SIOP Registers
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
99
9.3.2 SIOP Status Register
The SIOP status register (SSR) is located at address $000B and contains two read-only bits. Figure 9-5
shows the position of each bit in the register and indicates the value of each bit after reset.
SPIF — Serial Port Interrupt Flag
The SPIF is a read-only status bit that is set on the last rising edge of SCK and indicates that a data
transfer has been completed. It has no effect on any future data transfers and can be ignored. The
SPIF bit can be cleared by reading the SSR followed by a read or write of the SDR or by writing a logic
1 to the SPIR bit in the SCR. If the SPIF is cleared before the last rising edge of SCK it will be set again
on the last rising edge of SCK. Reset clears the SPIF bit.
1 = Serial transfer complete, serial interrupt if the SPIE bit in SCR is set
0 = Serial transfer in progress or serial interface idle
DCOL — Data Collision Bit
The DCOL is a read-only status bit which indicates that an illegal access of the SDR has occurred. The
DCOL bit will be set when reading or writing the SDR after the first falling edge of SCK and before SPIF
is set. Reading or writing the SDR during this time will result in invalid data being transmitted or
received. The DCOL bit is cleared by reading the SSR (when the SPIF bit is set) followed by a read or
write of the SDR. If the last part of the clearing sequence is
done after another transfer has started, the DCOL bit will be set again. Reset clears the DCOL bit.
1 = Illegal access of the SDR occurred
0 = No illegal access of the SDR detected
Table 9-1. SIOP Clock Rate Selection
SPR1
SPR0
SIOP Clock Rate
Oscillator Frequency
Divided by:
00
64
01
32
10
16
11
8
Address:
$000B
Bit 7
654321
Bit 0
Read:
SPIF
DCOL
000000
Write:
Reset:
00000000
= Unimplemented
Figure 9-5. SIOP Status Register (SSR)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC705JJ7CDWE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
MC705JP7CPE 功能描述:8位微控制器 -MCU 8B MCU 224 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC705JP7CPE 制造商:Freescale Semiconductor 功能描述:IC 8BIT MCU 68HC05 2.1MHZ DIP-28
MC705K1CP 制造商:Motorola Inc 功能描述:16 PIN DIP INTEGRATED CIRCUIT
MC705L16CFUE 功能描述:8位微控制器 -MCU 8B MCU W/ EPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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