參數(shù)資料
型號: MC68HSC05J1A
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數(shù): 76/128頁
文件大?。?/td> 1620K
代理商: MC68HSC05J1A
Technical Data
MC68HC05J1A — Rev. 3.0
76
Multifunction Timer
MOTOROLA
Multifunction Timer
8.4 COP Watchdog
Four counter stages at the end of the timer make up the mask-optional
computer operating properly (COP) watchdog. (See
Figure 8-4
.)
The COP watchdog is a software error detection system that
automatically times out and resets the MCU if not cleared periodically by
a program sequence. Writing a logic 0 to bit 0 of the COP register clears
the COP watchdog and prevents a COP reset.
COPC — COP Clear Bit
This write-only bit resets the COP watchdog. Reading address $07F0
returns the ROM data at that address.
NOTE:
The STOP instruction turns off the COP watchdog. In applications that
depend on the COP watchdog, the STOP instruction can be disabled by
a mask option.
Address:
$07F0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
COPC
Reset:
U
U
U
U
U
U
U
0
= Unimplemented
Figure 8-4. COP Register (COPR)
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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