參數(shù)資料
型號(hào): MC68HLC705KJ1CDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO16
封裝: SOIC-16
文件頁數(shù): 120/144頁
文件大?。?/td> 1377K
代理商: MC68HLC705KJ1CDWR2
Low-Power Modes
Effects of Stop and Wait Modes
MC68HC705KJ1 — Rev. 2.0
Technical Data
MOTOROLA
Low-Power Modes
77
6.4.3 COP Watchdog
Effects of STOP and WAIT on the COP watchdog are discussed here.
6.4.3.1 STOP
The STOP instruction:
Clears the COP watchdog counter
Disables the COP watchdog clock
NOTE:
To prevent the STOP instruction from disabling the COP watchdog,
program the stop-to-wait conversion bit (SWAIT) in the mask option
register to logic 1.
After exit from stop mode by external interrupt, the COP watchdog
counter immediately begins counting from $0000 and continues
counting throughout the oscillator stabilization delay.
NOTE:
Immediately after exiting stop mode by external interrupt, service the
COP to ensure a full COP timeout period.
After exit from stop mode by reset:
The COP watchdog counter immediately begins counting from
$0000.
The COP watchdog counter is cleared at the end of the oscillator
stabilization delay and begins counting from $0000 again.
6.4.3.2 WAIT
The WAIT instruction has no effect on the COP watchdog.
NOTE:
To prevent a COP timeout during wait mode, exit wait mode periodically
to service the COP.
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