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參數(shù)資料
| 型號： | MC68HCP11E1CFNE2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 219/242頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8BIT 52-PLCC |
| 標準包裝： | 23 |
| 系列： | HC11 |
| 核心處理器： | HC11 |
| 芯體尺寸： | 8-位 |
| 速度： | 2MHz |
| 連通性： | SCI，SPI |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 38 |
| 程序存儲器類型： | ROMless |
| EEPROM 大?。?/td> | 512 x 8 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x8b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 52-LCC（J 形引線） |
| 包裝： | 管件 |
Central Processor Unit (CPU)
M68HC11E Family Data Sheet, Rev. 5.1
78
Freescale Semiconductor
TSTA
Test A for Zero
or Minus
A – 0
A
INH
4D
—
2
—
00
TSTB
Test B for Zero
or Minus
B – 0
B
INH
5D
—
2
—
00
TSX
Transfer Stack
Pointer to X
SP + 1
IX
INH
30
—
3
—
——
———
——
TSY
Transfer Stack
Pointer to Y
SP + 1
IY
INH
18
30
—
4
—
——
———
——
TXS
Transfer X to
Stack Pointer
IX – 1
SP
INH
35
—
3
—
——
———
——
TYS
Transfer Y to
Stack Pointer
IY – 1
SP
INH
18
35
—
4
—
——
———
——
WAI
Wait for
Interrupt
Stack Regs & WAIT
INH
3E
—
**
—
XGDX
Exchange D
with X
IX
D, D IX
INH
8F
—
3
—
——
———
——
XGDY
Exchange D
with Y
IY
D, D IY
INH
18
8F
—
4
—
——
———
——
Cycle
*
Infinity or until reset occurs
**
12 cycles are used beginning with the opcode fetch. A wait state is entered which remains in effect for an integer number of MPU E-clock
cycles (n) until an interrupt is recognized. Finally, two additional cycles are used to fetch the appropriate interrupt vector (14 + n total).
Operands
dd
= 8-bit direct address ($0000–$00FF) (high byte assumed to be $00)
ff
= 8-bit positive offset $00 (0) to $FF (255) (is added to index)
hh
= High-order byte of 16-bit extended address
ii
= One byte of immediate data
jj
= High-order byte of 16-bit immediate data
kk
= Low-order byte of 16-bit immediate data
ll
= Low-order byte of 16-bit extended address
mm
= 8-bit mask (set bits to be affected)
rr
= Signed relative offset $80 (–128) to $7F (+127)
(offset relative to address following machine code offset byte))
Operators
( )
Contents of register shown inside parentheses
Is transferred to
Is pulled from stack
Is pushed onto stack
Boolean AND
+
Arithmetic addition symbol except where used as inclusive-OR symbol
in Boolean formula
⊕
Exclusive-OR
Multiply
:
Concatenation
–
Arithmetic subtraction symbol or negation symbol (two’s complement)
Condition Codes
—
Bit not changed
0
Bit always cleared
1
Bit always set
Bit cleared or set, depending on operation
↓
Bit can be cleared, cannot become set
Table 4-2. Instruction Set (Sheet 7 of 7)
Mnemonic
Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
X
H
I
N
Z
V
C
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MC68HCP11E1CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 512 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68HCP11E1CFU3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Freescale Semiconductor 功能描述: |
| MC68HCP11E1CP3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Motorola Inc 功能描述: |
| MC68HCP11E1FU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HCP11E1VFN2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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