參數(shù)資料
型號: MC68HC705P6AMDW
廠商: Freescale Semiconductor
文件頁數(shù): 20/98頁
文件大?。?/td> 0K
描述: IC MCU 4.6K OTP 2.1MHZ 28-SOIC
標(biāo)準(zhǔn)包裝: 26
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 4.5KB(4.5K x 8)
程序存儲器類型: OTP
RAM 容量: 176 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Freescale Semiconductor
27
Chapter 3
Operating Modes
3.1 Introduction
The MC68HC705P6A has two modes of operation that affect the pinout and architecture of the MCU:
user mode and bootloader mode. The user mode is normally used for the application and the bootloader
mode is used for programming the EPROM. The conditions required to enter each mode are shown in
Table 3-1. The mode of operation is determined by the voltages on the IRQ/VPP and PD7/TCAP pins on
the rising edge of the external RESET pin.
The mode of operation is also determined whenever the internal computer operating properly (COP)
watchdog timer resets the MCU. When the COP timer expires, the voltage applied to the IRQ/VPP pin
controls the mode of operation while the voltage applied to PD7/TCAP is ignored. The voltage applied to
PD7/TCAP during the last rising edge on RESET is stored in a latch and used to determine the mode of
operation when the COP watchdog timer resets the MCU.
3.2 User Mode
The user mode allows the MCU to function as a self-contained microcontroller, with maximum use of the
pins for on-chip peripheral functions. All address and data activity occurs within the MCU and are not
available externally. User mode is entered on the rising edge of RESET if the IRQ/VPP pin is within the
normal operating voltage range. The pinout for the user mode is shown in Figure 3-1.
In the user mode, there is an 8-bit I/O port, a second 8-bit I/O port shared with the analog-to-digital (A/D)
subsystem, one 3-bit I/O port shared with the serial input/output port (SIOP), and a 3-bit port shared with
the 16-bit timer subsystem, which includes one general-purpose I/O pin.
3.3 Bootloader Mode
The bootloader mode provides a means to program the user EPROM from an external memory device or
host computer. This mode is entered on the rising edge of RESET if VPP is applied to the IRQ/VPP pin and
VDD is applied to the PD7/TCAP pin. The user code in the external memory device must have data located
in the same address space it will occupy in the internal MCU EPROM, including the mask option register
(MOR) at $1EFF and $1F00.
Table 3-1. Operating Mode Conditions After Reset
RESET Pin
IRQ/VPP
PD7/TCAP
Mode
VSS to VDD
Single chip
VPP
VDD
Bootloader
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