參數(shù)資料
型號(hào): MC68HC705P6ACSD
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER
文件頁數(shù): 124/130頁
文件大小: 1541K
代理商: MC68HC705P6ACSD
Mask Option Register (MOR)
Mask Option Register
MC68HC705P6A — Rev. 2.0
Advance Information
MOTOROLA
Mask Option Register (MOR)
93
SPR0 and SPR1 — SIOP Clock Rate
The SPR0 and SPR1 bits determine the clock rate used to transfer the
serial data to and from the SIOP. The various clock rates available are
given in Table 11-1.
SWAIT — STOP Instruction Mode
Setting the SWAIT bit will prevent the STOP instruction from stopping
the on-board oscillator. Clearing the SWAIT bit will permit the STOP
instruction to stop the on-board oscillator and place the MCU in stop
mode. Executing the STOP instruction when SWAIT is set will place
the MCU in halt mode. See 3.5.1 STOP Instruction for additional
information.
SECURE — Security State(1)
If SECURE bit is set, the EPROM is locked.
PA(0:7)PU — Port A Pullups/Interrupt Enable/Disable
If any PA(0:7)PU is selected, that pullup/interrupt is enabled. The
interrupt sensitivity will be selected via the LEVEL bit in the same way
as the IRQ pin.
NOTE:
The port A pullup/interrupt function is NOT available on the ROM device,
MC68HC05P6.
Table 11-1. SIOP Clock Rate
SPR1
SPR0
SIOP Master Clock
00
fosc ÷ 64
01
fosc ÷ 32
10
fosc ÷ 16
11
fosc ÷ 8
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the EPROM/OTPROM difficult for unauthorized users.
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參數(shù)描述
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