參數(shù)資料
型號(hào): MC68HC705P6A
廠商: Motorola, Inc.
英文描述: HCMOS Microcontroller Unit
中文描述: HCMOS微控制器
文件頁數(shù): 59/130頁
文件大?。?/td> 1541K
代理商: MC68HC705P6A
MC68HC705P6A
Rev. 2.0
Advance Information
MOTOROLA
Serial Input/Output Port (SIOP)
59
Advance Information
MC68HC705P6A
Section 7. Serial Input/Output Port (SIOP)
7.1 Contents
7.2
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
7.3
7.3.1
7.3.2
7.3.3
SIOP Signal Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Serial Clock (SCK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Serial Data Input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Serial Data Output (SDO). . . . . . . . . . . . . . . . . . . . . . . . . . .61
7.4
7.4.1
7.4.2
7.4.3
SIOP Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
SIOP Control Register (SCR). . . . . . . . . . . . . . . . . . . . . . . .62
SIOP Status Register (SSR) . . . . . . . . . . . . . . . . . . . . . . . .63
SIOP Data Register (SDR). . . . . . . . . . . . . . . . . . . . . . . . . .64
7.2 Introduction
The simple synchronous serial I/O port (SIOP) subsystem is designed to
provide efficient serial communications between peripheral devices or
other MCUs. The SIOP is implemented as a 3-wire master/slave system
with serial clock (SCK), serial data input (SDI), and serial data output
(SDO). A block diagram of the SIOP is shown in
Figure 7-1
. A mask
programmable option determines whether the SIOP is MSB or LSB first.
The SIOP subsystem shares its input/output pins with port B. When the
SIOP is enabled (SPE bit set in register SCR), port B DDR and data
registers are modified by the SIOP. Although port B DDR and data
registers can be altered by application software, these actions could
affect the transmitted or received data.
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