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參數(shù)資料
| 型號(hào)： | MC68HC11EA9MFN3 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁(yè)數(shù)： | 22/58頁(yè) |
| 文件大小： | 583K |
| 代理商： | MC68HC11EA9MFN3 |
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MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
29
DDA[7:0] — Data Direction for Port A
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
DDB[7:0] — Data Direction for Port B
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
PORTCL is used in the handshake clearing mechanism. When an active edge occurs on the STRA pin,
port C data is latched into the PORTCL register. Reads of this register return the last value latched into
PORTCL and clear STAF flag (following a read of PIOC with STAF set).
DDC[7:0] — Data Direction for Port C
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
DDRA — Port A Data Direction
$1001
BIT 7
654321
BIT 0
DDA7
DDA6
DDA5
DDA4
DDA3
DDA2
DDA1
DDA0
RESET:
00000000
PORTB — Port B Data
$1004
BIT 7
654321
BIT 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
00000000
Alt. Pin
Func.:
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
DDRB — Port B Data Direction
$1006
BIT 7
654321
BIT 0
DDB7
DDB6
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
RESET:
00000000
PORTC — Port C Data
$1003
BIT 7
654321
BIT 0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
RESET:
00000000
Alt. Pin
Func.:
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
Or:
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
PORTCL — Port C Latched Data
$1005
BIT 7
654321
BIT 0
PCL7
PCL6
PCL5
PCL4
PCL3
PCL2
PCL1
PCL0
RESET:
00000000
DDRC — Port C Data Direction
$1007
BIT 7
654321
BIT 0
DDC7
DDC6
DDC5
DDC4
DDC3
DDC2
DDC1
DDC0
RESET:
00000000
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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