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參數(shù)資料
| 型號： | MC68HC11EA9MFN3 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 14/58頁 |
| 文件大?。?/td> | 583K |
| 代理商： | MC68HC11EA9MFN3 |
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MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
21
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the
latch prior to reset (unchanged), but the function of COP is controlled by DISR bit in TEST1 register.
Bits [7:4] — Not Implemented
Always read zero
NOSEC — Security Disable
NOSEC is invalid unless the security mask option is specified before the MCU is manufactured. If se-
curity mask option is omitted NOSEC always reads one. The security feature protects the contents of
RAM and EEPROM.
0 = Security enabled
1 = Security disabled
NOCOP — COP System Disable
Refer to 5 Resets and Interrupts.
ROMON — ROM/EPROM/OTPROM Enable
When this bit is zero, the ROM or EPROM/OTPROM is disabled and that memory space becomes ex-
ternally addressed. In single-chip mode, ROMON is forced to one to enable ROM/EPROM/OTPROM
regardless of the state of the ROMON bit.
0 = ROM/EPROM/OTPROM disabled from the memory map
1 = ROM/EPROM/OTPROM present in the memory map
EEON — EEPROM Enable
When this bit is zero, the EEPROM is disabled and that memory space becomes externally addressed.
0 = EEPROM removed from the memory map
1 = EEPROM present in the memory map
4.10.3 EEPROM Security
The optional security feature, available only on ROM-based MCUs, protects the EEPROM and RAM
contents from unauthorized access. A program, or a key portion of a program, can be protected against
unauthorized duplication. To accomplish this, the protection mechanism restricts operation of protected
devices to the single-chip modes. This prevents the memory locations from being monitored externally
because single-chip modes do not allow visibility of the internal address and data buses. Resident pro-
grams, however, have unlimited access to the internal EEPROM and RAM and can read, write, or trans-
fer the contents of these memories.
CONFIG — Security, COP, ROM/EPROM, and EEPROM Enables
$103F
BIT 7
654321
BIT 0
————
NOSEC
NOCOP
ROMON
EEON
RESETS:
S. Chip:
0000
U
1
U
Boot:
0000
U
U(L)
U
Exp.:
00001
U
Test:
00001
U(L)
U
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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