參數(shù)資料
型號: MC68HC05C9ECP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 91/144頁
文件大?。?/td> 1628K
代理商: MC68HC05C9ECP
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EEMENT
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U
IR
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Resets
Advance Information
MC68HC05C9E
50
Resets
MOTOROLA
5.5.2 COP Control Register
The COP control register (COPCR), shown in Figure 5-5, performs
these functions:
Enables clock monitor function
Enables COP function
Selects timeout duration of COP timer
And flags these conditions:
COP timeout
Clock monitor reset
COPF — Computer Operating Properly Flag
Reading the COP control register clears COPF.
1 = COP or clock monitor reset has occurred.
0 = No COP or clock monitor reset has occurred.
CME — Clock Monitor Enable Bit
This bit is readable any time, but may be written only once.
1 = Clock monitor enabled
0 = Clock monitor disabled
Address: $001E
Bit 7
6
54321
Bit 0
Read:
0
COPF
CME
COPE
CM1
CM0
Write:
Reset:
00
0
U
0000
= Unimplemented
U = Undetermined
Figure 5-5. COP Control Register (COPCR)
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