參數(shù)資料
型號： MC68HC05C9AP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 91/160頁
文件大?。?/td> 4128K
代理商： MC68HC05C9AP
NON-DISCLOSURE
AGREEMENT
REQUIRED
Central Processing Unit
General Release Specification
MC68HC05C9A — Rev. 4.0
Central Processing Unit
3.3.5 Condition Code Register (CCR)
The CCR is a 5-bit register in which four bits are used to indicate the
results of the instruction just executed, and the fifth bit indicates whether
interrupts are masked. These bits can be individually tested by a
program, and specific actions can be taken as a result of their state.
Each bit is explained in the following paragraphs.
Half Carry (H)
This bit is set during ADD and ADC operations to indicate that a carry
occurred between bits 3 and 4.
Interrupt (I)
When this bit is set, the timer, SCI, SPI, and external interrupt are
masked (disabled). If an interrupt occurs while this bit is set, the
interrupt is latched and processed as soon as the interrupt bit is
cleared.
Negative (N)
When set, this bit indicates that the result of the last arithmetic, logical,
or data manipulation was negative.
Zero (Z)
When set, this bit indicates that the result of the last arithmetic, logical,
or data manipulation was zero.
Carry/Borrow (C)
When set, this bit indicates that a carry or borrow out of the arithmetic
logical unit (ALU) occurred during the last arithmetic operation. This
bit is also affected during bit test and branch instructions and during
shifts and rotates.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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