參數(shù)資料
型號: MC68HC05C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 122/160頁
文件大?。?/td> 783K
代理商: MC68HC05C9ACFN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Capture/Compare Timer
General Release Specification
MC68HC05C9A Rev. 4.0
64
Capture/Compare Timer
MOTOROLA
8.4.4 Alternate Timer Registers (ATRH and ATRL)
The alternate timer registers, shown in Figure 8-5, contain the current
high and low bytes of the 16-bit counter. Reading ATRH before reading
ATRL causes ATRL to be latched until ATRL is read. Reading ATRL has
no effect on the timer overflow flag (TOF). Writing to the alternate timer
registers has no effect.
Figure 8-5. Alternate Timer Registers (ATRH and ATRL)
NOTE:
To prevent interrupts from occurring between readings of ATRH and
ATRL, set the interrupt flag in the condition code register before reading
ATRH, and clear the flag after reading ATRL.
ATRH
$001A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT15
BIT14
BIT13
BIT12
BIT11
BIT10
BIT9
BIT8
Write:
Reset:
11111111
ATRL
$001B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
Write:
Reset:
11111100
= Unimplemented
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