參數資料
型號: MC68HC05C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數: 104/160頁
文件大小: 783K
代理商: MC68HC05C9ACFN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Resets
General Release Specification
MC68HC05C9A Rev. 4.0
48
Resets
MOTOROLA
5.5.2 COP Control Register
The COP control register, shown in Figure 5-5, performs the following
functions:
Enables clock monitor function
Enables COP function
Selects timeout duration of COP timer
and flags the following conditions:
A COP timeout
Clock monitor reset
COPF — Computer Operating Properly Flag
Reading the COP control register clears COPF.
1 = COP or clock monitor reset has occurred.
0 = No COP or clock monitor reset has occurred.
CME — Clock Monitor Enable
This bit is readable any time, but may be written only once.
1 = Clock monitor enabled
0 = Clock monitor disabled
$001E
Bit 7
654321
Bit 0
Read:
0
COPF
CME
COPE
CM1
CM0
Write:
Reset:
0
U
0000
= Unimplemented
U = Undetermined
Figure 5-5. COP Control Register (COPCR)
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