Note: Program RAM is NOT available on the 56F8122 dev" />
參數(shù)資料
型號： MC56F8122VFAE
廠商： Freescale Semiconductor
文件頁數(shù)： 64/136頁
文件大?。?/td> 0K
描述： IC DSP 16BIT 40MHZ 48-LQFP
標準包裝： 250
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 40MHz
連通性： SCI，SPI
外圍設備： POR，WDT
輸入/輸出數(shù)： 21
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 4K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 托盤
產(chǎn)品目錄頁面： 734 (CN2011-ZH PDF)
Interrupt Vector Table
56F8322 Technical Data, Rev. 16
Freescale Semiconductor
33
Preliminary
Note: Program RAM is NOT available on the 56F8122 device.
4.3 Interrupt Vector Table
Table 4-3 provides the device’s reset and interrupt priority structure, including on-chip peripherals. The
table is organized with higher-priority vectors at the top and lower-priority interrupts lower in the table.
As indicated, the priority of an interrupt can be assigned to different levels, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see
Section 5.6.11 for the reset value of the VBA.
In some configurations, the reset address and COP reset address will correspond to vector 0 and 1 of the
interrupt vector table. In these instances, the first two locations in the vector table must contain branch or
JMP instructions. All other entries must contain JSR instructions.
Note: PWM, CAN and Quadrature Decoder are NOT available on the 56F8122 device.
Table 4-2 Program Memory Map at Reset
Begin/End Address
Memory Allocation
P: $1F FFFF
P: $03 0000
RESERVED
P: $02 FFFF
P: $02 F800
On-Chip Program RAM
4KB
P: $02 F7FF
P: $02 1000
RESERVED
P: $02 0FFF
P: $02 0000
Boot Flash
8KB
Cop Reset Address = $02 0002
Boot Location = $02 0000
P: $01 FFFF
P: $00 4000
RESERVED
P: $00 3FFF
P: $00 0000
Internal Program Flash
32KB
Table 4-3 Interrupt Vector Table Contents1
Peripheral
Vector
Number
Priority
Level
Vector Base
Address +
Interrupt Function
Reserved for Reset Overlay2
Reserved for COP Reset Overlay2
core
2
3
P:$04
Illegal Instruction
core
3
P:$06
SW Interrupt 3
core
4
3
P:$08
HW Stack Overflow
core
5
3
P:$0A
Misaligned Long Word Access
相關(guān)PDF資料
PDF描述
VE-B5J-IX-B1 CONVERTER MOD DC/DC 36V 75W
MC908QC16VDRE IC MCU 8BIT 16K FLASH 28-TSSOP
TVP5150APBS IC NTSC/PAL/SECAM DECODER 32TQFP
MCF51JE256VMB IC MCU 256K COLDF 81-PBGA
VE-B5J-IW-B1 CONVERTER MOD DC/DC 36V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8123 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-bit Hybrid Controllers
MC56F8123VFB 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-bit Hybrid Controllers
MC56F8123VFBE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8135 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controller
MC56F8135E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controller
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*