參數(shù)資料
型號： MC56F8023VLC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 93/157頁
文件大小： 2117K
代理商： MC56F8023VLC
56F8033/56F8023 Data Sheet, Rev. 6
40
Freescale Semiconductor
4.6 Peripheral Memory-Mapped Registers
On-chip peripheral registers are part of the data memory map on the 56800E series. These locations may
be accessed with the same addressing modes used for ordinary Data memory, except all peripheral
registers should be read or written using word accesses only.
Table 4-8 summarizes base addresses for the set of peripherals on the 56F8033/56F8023 device.
Peripherals are listed in order of the base address.
The following tables list all of the peripheral registers required to control or access the peripherals.
X:$FF FFFC
OCLSR
Core Lock / Unlock Status Register
X:$FF FFFB - X:$FF FFA1
Reserved
X:$FF FFA0
OCR
Control Register
X:$FF FF9F
Instruction Step Counter
X:$FF FF9E
OSCNTR (24 bits)
Instruction Step Counter
X:$FF FF9D
OSR
Status Register
X:$FF FF9C
OBASE
Peripheral Base Address Register
X:$FF FF9B
OTBCR
Trace Buffer Control Register
X:$FF FF9A
OTBPR
Trace Buffer Pointer Register
X:$FF FF99
Trace Buffer Register Stages
X:$FF FF98
OTB (21 - 24 bits/stage)
Trace Buffer Register Stages
X:$FF FF97
Breakpoint Unit Control Register
X:$FF FF96
OBCR (24 bits)
Breakpoint Unit Control Register
X:$FF FF95
Breakpoint Unit Address Register 1
X:$FF FF94
OBAR1 (24 bits)
Breakpoint Unit Address Register 1
X:$FF FF93
Breakpoint Unit Address Register 2
X:$FF FF92
OBAR2 (32 bits)
Breakpoint Unit Address Register 2
X:$FF FF91
Breakpoint Unit Mask Register 2
X:$FF FF90
OBMSK (32 bits)
Breakpoint Unit Mask Register 2
X:$FF FF8F
Reserved
X:$FF FF8E
OBCNTR
EOnCE Breakpoint Unit Counter
X:$FF FF8D
Reserved
X:$FF FF8C
Reserved
X:$FF FF8B
Reserved
X:$FF FF8A
OESCR
External Signal Control Register
X:$FF FF89 - X:$FF FF00
Reserved
Table 4-7 EOnCE Memory Map (Continued)
Address
Register Acronym
Register Name
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