參數(shù)資料
型號(hào)： MC56F8023VLC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 4/157頁
文件大?。?/td> 2117K
代理商： MC56F8023VLC
Register Descriptions
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor
101
11x = Reserved
6.3.20.3
Select Peripheral Input Source for SYNC Input to DAC 0
(ISS1_DSYNC0)—Bits 2–0
This field selects the alternate input source signal to feed DAC0 SYNC input.
000 = PIT0 (Internal) - Use Programmable Interval Timer 0 Output as DAC SYNC input (default)
001 = Reserved
010 = Reserved
011 = PWM SYNC (Internal) - Use PWM reload synchronization signal as DAC SYNC input
100 = TA0 (Internal) - Use Timer A0 output as DAC SYNC input
101 = TA1 (Internal) - Use Timer A1 output as DAC SYNC input
11x = Reserved
6.3.21
Internal Peripheral Source Select Register 2 for Quad Timer A
(SIM_IPS2)
See Section 6.3.19 for general information about Internal Peripheral Source Select registers.
Figure 6-25 Internal Peripheral Source Select Register for TMRA (SIM_IPS2)
6.3.21.1
Reserved—Bits 15–13
This bit field is reserved. Each bit must be set to 0.
6.3.21.2
Select Peripheral Input Source for TA3 (IPS2_TA3)—Bit 12
This field selects the alternate input source signal to feed Quad Timer A, input 3.
0 = I/O pin (External) - Use Timer A3 input/output pin
1 = PWM SYNC (Internal) - Use PWM reload synchronization signal
6.3.21.3
Reserved—Bits 11–9
This bit field is reserved. Each bit must be set to 0.
6.3.21.4
Select Input Source for TA2 (ISS2_TA2)—Bit 8
This field selects the alternate input source signal to feed Quad Timer A, input 2.
0 = I/O pin (External) - Use Timer A2 input/output pin
1 = CMPBO (Internal) - Use Comparator B output
Base + $1A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
IPS2_
TA3
0
IPS2_
TA2
0
IPS2_
TA1
0
Write
RESET
0
0000000
0000
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