參數(shù)資料
型號： MC56F8023VLC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 78/157頁
文件大?。?/td> 2117K
代理商： MC56F8023VLC
56F8033/56F8023 Signal Pins
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor
27
GPIOB4
(TA010)
(PSRC2)
(CLKO)
19
Input/
Output
Input/
Output
Input
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA0 — Timer A, Channel 0
PSRC2 — External PWM signal source input for the complementary
PWM0/PWM1 pair.
Clock Output — This is a buffered clock output; the clock source is
selected by Clockout Select (CLKOSEL) bits in the Clock Output
Select Register (CLKOUT). See Section 6.3.7.
After reset, the default state is GPIOB4. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
10The TA0 signal is also brought out on the GPIOB4 and GPIOA6 pins.
GPIOB5
(TA1)
(FAULT3)
(CLKIN)
4
Input/
Output
Input/
Output
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA1 — Timer A, Channel 1
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
Return to Table 2-2
Table 2-3 56F8033/56F8023 Signal and Package Information for the 32-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
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