
MC34118
MOTOROLA
5
PIN DESCRIPTION
Pin
Name
Description
1
FO
Filter output. Output impedance is less than
50 ohms.
2
FI
Filter input. Input impedance is greater than
1.0 Mohm.
3
CD
Chip Disable. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) disables the
IC to conserve power. Input impedance is
nominally 90 k.
4
VCC
A supply voltage of + 2.8 to + 6.5 volts is
required, at ≈5.0 mA. As VCC falls from 3.5 to
2.8 volts, an AGC circuit reduces the receive
attenuator gain by ≈25 dB (when in the
receive mode).
5
HTO+
Output of the second hybrid amplifier. The
gain is internally set at -- 1.0 to provide a
differential output, in conjunction with HTO--,
to the hybrid transformer.
6
HTO--
Output of the first hybrid amplifier. The gain of
the amp is set by external resistors.
7
HTI
Input and summing node for the first hybrid
amplifier. DC level is ≈VB.
8
TXO
Output of the transmit attenuator. DC level is
approximately VB.
9
TXI
Input to the transmit attenuator. Max. signal
level is 350 mVrms. Input impedance is
≈10 k.
10
MCO
Output of the microphone amplifier. The gain
of the amplifier is set by external resistors.
11
MCI
Input and summing node of the microphone
amplifier. DC level is ≈VB.
12
MUT
Mute input. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) mutes the
microphone amplifier without affecting the rest
of the circuit. Input impedance is nominally
90 k.
Pin
Name
Description
13
VLC
Volume control input. When VLC = VB,the
receive attenuator is at maximum gain when
in the receive mode. When VLC = 0.3 VB,the
receive gain is down 35 dB. Does not affect
the transmit mode.
14
CT
An RC at this pin sets the response time for
the circuit to switch modes.
15
VB
An output voltage ≈VCC/2. This voltage is a
system ac ground, and biases the volume
control. A filter cap is required.
16
CPT
An RC at this pin sets the time constant for
the transmit background monitor.
17
TLI2
Input to the transmit level detector on the
mike/speaker side.
18
TLO2
Output of the transmit level detector on the
mike/speaker side, and input to the transmit
background monitor.
19
RLO2
Output of the receive level detector on the
mike/speaker side.
20
RLI2
Input to the receive level detector on the
mike/speaker side.
21
RXI
Input to the receive attenuator and dial tone
detector. Max input level is 350 mV RMS.
Input impedance is ≈10 k.
22
RXO
Output of the receive attenuator. DC level is
approximately VB.
23
TLI1
Input to the transmit level detector on the line
side.
24
TLO1
Output of the transmit level detector on the
line side.
25
RLO1
Output of the receive level detector on the line
side, and input to the receive background
monitor.
26
RLI1
Input to the receive level detector on the line
side.
27
CPR
An RC at this pin sets the time constant for
the receive background monitor.
28
GND
Ground pin for the entire IC.
NOTE: Pin numbers are identical for the DIP package and the SOIC
package.