
MC100SX1451FI100
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
10
Reserved Bits
All reserved bits are allocated for future enhancements.
The user must write logic ‘H’ values into these bits. Reserved
bits are read back as ‘do not care’.
CRYSTAL OSCILLATOR REQUIREMENTS
The AutoBahn requires a high quality frequency source
(FOSC) which is used as the reference for the PLL Clock
Generator. The performance requirements were targeted to
provide the AutoBahn chip appropriate design margin for the
serial data transfer operation as well as to allow the user
flexibility is selecting a commercially available low cost
crystal oscillator. Below is a list of the key performance
attributes of the crystal oscillator.
Parameter
Rating
Frequency
Stability
Output Levels
Duty Cycle
Rise/Fall Time
Operating Range
Startup Time
25.000MHz
±
100ppm
TTL
45% / 55% at 1.5V
≤
7nsec
0
°
C to 70
°
C
10msec
There are many suppliers of high quality crystal oscillator
frequency sources which meet or exceed the above
requirements. One such supplier is JVC. Their part numbers
for 25MHz oscillators are as follows: VX4321–2500 (Metal
Can) or SMC2500 (SMD).
THERMAL CONSIDERATIONS
As in any system, proper thermal management is
essential to establish the appropriate trade–off between
performance, density, reliability, and cost. In particular, the
designer should be aware of the reliability implications of
continuously operating semiconductor devices at high
junction temperatures.
The increasing use of surface mount devices (SMD) is
putting a greater emphasis on the need for better thermal
system management. SMD devices require less board space
than their through–hole equivalents; so, designs
incorporating SMD technologies have a higher thermal
density. To optimize the thermal management of the system,
it is imperative that the user understand all the variables
which contribute to the device junction temperature.
By proper package selection, the vendor can select the
proper package and die attach method to decrease the
thermal resistance and thus the junction temperature of the
device. The user has the greatest control of additional
variables which commonly impact the thermal performance
of the device. Ambient temperatures, air flow, and related
cooling techniques are obvious user–controlled variables;
however, PCB substrate material, layout density, size of the
air gap between the board and the package, amount of
exposed copper interconnect, use of thermally conductive
epoxies, and the number of boards in a chassis can all have
significant impacts on the thermal performance of the
system.
PCB substrates have different thermal characteristics
which should be explored when considering alternatives. The
user should also account for the different power dissipations
of various components in the system and space them on the
PCB accordingly. In this way the heat load is spread across a
larger area and “hot spots” do not appear in the layout.
Copper interconnect traces act as heat radiators; therefore,
improved thermal dissipation can be achieved through the
addition of interconnect traces on the top layer. Finally,
thermally conductive epoxies can accelerate the transfer of
heat from the device to the PCB where it can be more easily
transferred to the ambient.
The following equation can be used to estimate the
junction temperature of a device in a given environment:
TJ = TA + PD
Θ
JA
TJ
Junction Temperature
TA
Ambient Temperature
PD
Power Dissipation
Θ
JA Average Package Thermal Resistance
(Junction – Ambient)
The power dissipation is comprised of two elements: the
internal gate power and the power associated with the output
signals. Essentially, the two contributors can be calculated
separately, then added to give the total power dissipation for
the device. The source of the output power distribution
depends on whether the device is transmitting or receiving. In
transmit mode, the PECL outputs are dissipating power,
while in receive mode, the parallel outputs are dissipating
dynamic power. The worst case condition, when the
AutoBahn is in receive mode, is described below.
PD = Pstatic + Po (TTL)
where
Pstatic = ICC * VCC
VCC
Operating voltage
ICC
Static DC Current
and
Po (TTL) = No* CL * FD * VS ^2
CL
Capacitive load (in pF)
FD
Parallel Data Rate (0.5 * # MBits/sec)
VS
Output Swing
No
Number of outputs (16 or 32)