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參數(shù)資料
| 型號： | MC100EP446FAG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter |
| 中文描述： | 100E SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PQFP32 |
| 封裝： | LEAD FREE, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 278K |
| 代理商： | MC100EP446FAG |
MC10EP446, MC100EP446
http://onsemi.com
2
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
Figure 1. LQFP
32 Pinout
(Top View)
Warning: All V
and V
pins must be externally connected
to Power Supply to guarantee proper operation.
D
D
D
D
D
V
CC
S
OUT
V
EE
V
BB2
V
C
C
V
EF
V
EE
PCLK
PCLK
D
D
D
S
OUT
V
CF
SYNC
SYNC
V
CC
C
C
V
B
C
C
V
E
V
CC
V
CC
V
CC
MC10EP446
MC100EP446
Figure 2. QFN
32 Pinout
(Top View)
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
Exposed Pad (EP)
D
D
D
D
D
V
C
C
D
D
D
C
C
V
B
C
C
V
E
S
OUT
V
EE
PCLK
PCLK
S
OUT
V
CC
V
CC
V
CC
V
CC
V
EE
V
BB2
V
EF
V
CF
SYNC
SYNC
V
CC
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0*
D7*
ECL, CMOS, or TTL Parallel Data Input
S
OUT
, S
OUT
ECL Differential Serial Data Output
CLK*, CLK*
ECL Differential Clock Input
PCLK, PCLK
ECL Differential Parallel Clock Output
SYNC*, SYNC**
ECL Conversion Synchronizing Differential Input (Reset)***
CKSEL*
ECL Clock Input Selector
CKEN*, CKEN*
ECL Clock Enable Differential Input
V
CF
ECL, CMOS, or TTL Input Selector
V
EF
ECL Reference Mode Connection
V
BB1
,
V
BB2
Reference Voltage Output
V
CC
Positive Supply
V
EE
Negative Supply
* Pins will default LOW when left open.
**Pins will default HIGH when left open.
***The rising edge of SYNC will asynchronously reset the internal circuitry. The falling edge of the SYNC followed by the falling edge of CLK
initiates the conversion process synchronously on the next rising edge of CLK.
相關PDF資料 |
PDF描述 |
|---|---|
| MC100EP446FAR2G | 3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter |
| MC100EP52DG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DTG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DTR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP446FAG | 制造商:ON Semiconductor 功能描述:Translator / Logic Level Converter IC |
| MC100EP446FAR2 | 功能描述:串行到并行邏輯轉換器 3.3V/5V ECL 8-Bit RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446FAR2G | 功能描述:串行到并行邏輯轉換器 3.3V/5V ECL 8-Bit Serial to Parallel RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446MNG | 功能描述:串行到并行邏輯轉換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446MNR4G | 功能描述:串行到并行邏輯轉換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
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