參數(shù)資料
型號(hào)： MC100EP016MNG
廠商： ON SEMICONDUCTOR
元件分類： 計(jì)數(shù)器
英文描述： 100EP SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQCC32
封裝： 5 X 5 MM, 1 MM HEIGHT, 0.5 MM PITCH, LEAD FREE, QFN-32
文件頁(yè)數(shù)： 1/15頁(yè)
文件大小： 189K
代理商： MC100EP016MNG
Semiconductor Components Industries, LLC, 2007
August, 2007 - Rev. 12
1
Publication Order Number:
MC10EP016/D
MC10EP016, MC100EP016
3.3V / 5VECL 8-Bit
Synchronous Binary Up
Counter
Description
The MC10/100EP016 is a high-speed synchronous, presettable,
cascadeable 8-bit binary counter. Architecture and operation are the
same as the MC10E016 in the ECLinPS
family.
The counter features internal feedback to TC gated by the TCLD
(Terminal Count Load) pin. When TCLD is LOW (or left open, in
which case it is pulled LOW by the internal pulldowns), the TC
feedback is disabled, and counting proceeds continuously, with TC
going LOW to indicate an all-one state. When TCLD is HIGH, the TC
feedback causes the counter to automatically reload upon TC = LOW,
thus functioning as a programmable counter. The Qn outputs do not
need to be terminated for the count function to operate properly. To
minimize noise and power, unused Q outputs should be left
unterminated.
COUT and COUT provide differential outputs from a single,
non-cascaded counter or divider application. COUT and COUT
should not be used in cascade configuration. Only TC should be used
for a counter or divider cascade chain output.
A differential clock input has also been added to improve
performance.
The 100 Series contains temperature compensation.
Features
500 ps Typical Propagation Delay
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = -3.0 V to -5.5 V
Open Input Default State
Safety Clamp on Inputs
Internal TC Feedback (Gated)
Addition of COUT and COUT
8-Bit
Differential Clock Input
VBB Output
Fully Synchronous Counting and TC Generation
Asynchronous Master Reset
Pb-Free Packages are Available*
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
LQFP-32
FA SUFFIX
CASE 873A
MARKING
DIAGRAMS*
*For additional marking information, refer to
Application Note AND8002/D.
http://onsemi.com
MCxxx
EP016
AWLYYWWG
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G or
G = Pb-Free Package
(Note: Microdot may be in either location)
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
ORDERING INFORMATION
32
1
MCxxx
EP016
AWLYYWW
G
1
QFN32
MN SUFFIX
CASE 488AM
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