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參數(shù)資料
| 型號(hào)： | MC100EP016AFAR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V ECL 8-Bit Synchronous Binary Up Counter |
| 中文描述： | 100E SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQFP32 |
| 封裝： | LQFP-32 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 98K |
| 代理商： | MC100EP016AFAR2 |
MC100EP016A
http://onsemi.com
8
Applications Information
(continued)
H
L
H
H
L
L
L
H
H
H
H
TC
PE
CE
TCLD
CLK
P7
P6
P4
P3
P2
P1
P0
P5
Q7 Q6
Q4 Q3
Q2
Q1 Q0
Q5
Figure 4. Mod 2 to 256 Programmable Divider
CLK
COUT
COUT
To determine what value to load into the device to
accomplish the desired division, the designer simply
subtracts the binary equivalent of the desired divide ratio
from the binary value for 256. As an example for a divide
ratio of 113:
Pn’s = 256 113 = 8F
16
= 1000 1111
where:
P0 = LSB and P7 = MSB
Forcing this input condition as per the setup in Figure 4
will result in the waveforms of Figure 5. Note that the TC
output is used as the divide output and the pulse duration is
equal to a full clock period. For even divide ratios, twice the
desired divide ratio can be loaded into the EP016A and the
TC output can feed the clock input of a toggle flip flop to
create a signal divided as desired with a 50% duty cycle.
Table 1. Preset Values for Various Divide Ratios
Divide
Ratio
Preset Data Inputs
P7
P6
P5
P4
P3
P2
P1
P0
2
3
4
5
H
H
H
H
H
H
H
L
L
L
H
H
H
H
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
L
L
L
L
L
H
H
H
H
L
H
H
L
L
L
H
H
H
L
L
H
H
L
L
L
H
L
L
H
L
H
H
H
L
L
L
H
L
H
L
H
L
L
H
L
112
113
114
254
255
256
A single EP016A can be used to divide by any ratio from
2 to 256 inclusive. If divide ratios of greater than 256 are
needed multiple EP016As can be cascaded in a manner
similar to that already discussed. When EP016As are
cascaded to build larger dividers the TCLD pin will no
longer provide a means for loading on terminal count.
Because one does not want to reload the counters until all of
the devices in the chain have reached terminal count,
external gating of the TC pins must be used for multiple
EP016A divider chains.
PE
CLK
TC
Load
DIVIDE BY 113
Load
1001 0000
1001 0001
1111 1100
1111 1101
1111 1110
1111 1111
Figure 5. Divide by 113 EP016A Programmable Divider Waveforms
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| MC100EP016AMNR4G | 功能描述:計(jì)數(shù)器移位寄存器 3.3V ECL 8BT COUNTER BBG ECL RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100EP016FA | 功能描述:IC COUNTER 8BIT SYNC ECL 32LQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 -計(jì)數(shù)器，除法器 系列:100EP 產(chǎn)品變化通告:1Q2012 Discontinuation 30/Mar/2012 標(biāo)準(zhǔn)包裝:2,500 系列:74HC 邏輯類型:二進(jìn)制計(jì)數(shù)器 方向:上 元件數(shù):1 每個(gè)元件的位元數(shù):12 復(fù)位:異步 計(jì)時(shí):- 計(jì)數(shù)速率:50MHz 觸發(fā)器類型:負(fù)邊沿 電源電壓:2 V ~ 6 V 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| MC100EP016FAG | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5V ECL 8−Bit Synchronous Binary Up Counter |
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