參數(shù)資料
型號： MC-22212361F9-E85X-CD5
元件分類： 存儲器
英文描述： SPECIALTY MEMORY CIRCUIT, PBGA85
封裝： 11 X 8 MM, FBGA-85
文件頁數(shù)： 11/28頁
文件大?。?/td> 385K
代理商： MC-22212361F9-E85X-CD5
Preliminary Data Sheet M15855EJ3V0DS
19
MC-22212361-X
Write Cycle (Program /Erase) (Flash Memory)
(1/2)
Parameter
Symbol
-D80X
-E85X
Unit
Note
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
Write cycle time
tWC
80
85
ns
Address setup time (/WE to address)
tAS
00
ns
Address setup time (/CEf to address)
tAS
00
ns
Address hold time (/WE to address)
tAH
45
ns
Address hold time (/CEf to address)
tAH
45
ns
Input data setup time
tDS
45
ns
Input data hold time
tDH
00
ns
/OE hold time
Read
tOEH
00
ns
Toggle bit, Data polling
10
Read recovery time before write (/OE to /CEf)
tGHEL
00
ns
Read recovery time before write (/OE to /WE)
tGHWL
00
ns
/WE setup time (/CEf to /WE)
tWS
00
ns
/CEf setup time (/WE to /CEf)
tCS
00
ns
/WE hold time (/CEf to /WE)
tWH
00
ns
/CEf hold time (/WE to /CEf)
tCH
00
ns
Write pulse width
tWP
35
ns
/CEf pulse width
tCP
35
ns
Write pulse width high
tWPH
30
ns
/CEf pulse width high
tCPH
30
ns
Word programming operation time
tWPG
11
200
11
200
s
Chip programming operation time
tCPG
47
840
47
840
s
Sector erase operation time
4K words sector
tSER
0.15
1.0
0.15
1.0
s
1,2
32K words sector
0.5
1.5
0.5
1.5
4K words sector
0.5
3.0
0.5
3.0
1,3
32K words sector
0.7
5.0
0.7
5.0
Chip erase operation time
tCER
65.4
205
65.4
205
s
1,2
96.2
678
96.2
678
1,3
Accelerated programming time
tACCPG
7
150
7
150
s
Program / Erase cycle
300,000
cycle
VCCf setup time
tVCS
200
s
RY (/BY) recovery time
tRB
00
ns
/RESET pulse width
tRP
500
ns
/RESET high-voltage (VID) hold time
tRRB
20
s
from high of RY(/BY) when sector group is
temporarily unprotect
/RESET hold time
tRH
50
ns
Notes 1. The preprogramming time prior to the erase operation is not included.
2. Program / erase cycle : 100,000 cycles
3. Program / erase cycle : 300,000 cycles
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