參數(shù)資料
型號： MB91F467SAPMC-GSE2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-176
文件頁數(shù)： 74/144頁
文件大?。?/td> 5502K
代理商： MB91F467SAPMC-GSE2
MB91460S Series
DS07-16617-3E
35
4.2.
Pin connections in parallel programming mode
Resetting after setting the MD_[2:0] pins to [111] will halt CPU functioning. At this time, the Flash memory’s
interface circuit enables direct control of the Flash memory unit from external pins by directly linking some of
the signals to GP-Ports. Please see table below for signal mapping.
In this mode, the Flash memory appears to the external pins as a stand-alone unit. This mode is generally set
when writing/erasing using the parallel Flash programmer. In this mode, all operations of the 8.5 Mbits Flash
memory’s Auto Algorithms are available.
Correspondence between MBM29LV400TC and Flash Memory Control Signals
MBM29LV400TC
External pins
FR-CPU mode
MB91F467SA external pins
Comment
Flash memory
mode
Normal function
Pin number
INITX
INITX
97
RESET
FRSTX
NMIX
98
MD2
114
MD1
113
MD0
112
RY/BY
FMCS:RDY bit
RY/BYX
GP19_1
117
BYTE
Internally fixed to “H”
BYTEX
GP19_2
118
WE
Internal control signal
+ control via interface
circuit
WEX
GP18_0
122
OE
OEX
GP19_6
121
CE
CEX
GP19_5
120
ATDIN
MD3
91
EQIN
MONCLK
90
TESTX
GP19_4
119
RDYI
GP19_1
117
A-1
Internal address bus
FA0
GP09_1
41
A0 to A3
FA1 to FA4
GP06_0 to GP06_3
6 to 9
A4 to A7
FA5 to FA8
GP06_4 to GP06_7
10 to 13
A8 to A11
FA9 to FA12
GP05_0 to GP05_3
14 to 17
A12 to A15
FA13 to FA16
GP05_4 to GP05_7
18 to 21
A16 to A19
FA17 to FA20
GP07_0 to GP07_3
172 to 175
FA21
GP09_0
40
DQ0 to DQ7
Internal data bus
DQ0 to DQ7
GP01_0 to GP01_7
24 to 31
DQ8 to DQ15
GP00_0 to GP00_7
32 to 39
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