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參數(shù)資料
| 型號(hào)： | MB90F822PFM |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.65 MM, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 54/98頁 |
| 文件大?。?/td> | 1383K |
| 代理商： | MB90F822PFM |
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MB90820 Series
58
8.
PWC Timer (x 2)
The PWC (pulse width count) timer is a 16-bit multi-functional up counter with reload timer functions and input
signal pulse width count functions.
The PWC timer consists of a 16-bit counter, an input pulse divider, a division ratio control register, a count input
pin, a pulse output pin, and a 16-bit control register.
The PWC timer has the following features:
Interruption is generated when timer overflow or end of PWC measurement.
EI2OS is supported.
Timer functions :
- Generates an interrupt request at set time intervals.
- Outputs pulse signals synchronized with the timer cycle.
- Selects the counter clock from three internal clocks.
Pulse-width count functions:
- Counts the time between external pulse input events.
- Selects the counter clock from three internal clocks.
- Count mode:
H pulse width (rising edge to falling edge) / L pulse width (falling edge to rising edge)
Rising-edge cycle (rising edge to falling edge) / Falling-edge cycle (falling edge to rising edge)
Count between edges (rising or falling edge to falling or rising edge)
Capable of counting cycles by dividing input pulses by 22, 24, 26, 28 using an 8-bit input divider.
Generates an interrupt request upon the completion of count operation.
Selects single or consecutive count operation.
(1) Register configuration
Note : Registers PWC0 to PWC1 are word access only.
(Continued)
7
6
5
4
3
2
1
0
Bit
Division Ratio Control Register
R/W
0
R/W
0
Initial value
Read/write
DIV0, DIV1
Address: ch0 0000C4H
ch1 00002CH
DIV1
DIV0
15
14
13
12
11
10
9
8
Bit
PWC Data Buffer Register (Upper)
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Initial value
Read/write
PWC0, PWC1
Address: ch0 0000C3H
ch1 00002BH
7
6
5
4
3
2
1
0
Bit
PWC Data Buffer Register (Lower)
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Initial value
Read/write
PWC0, PWC1
Address: ch0 0000C2H
ch1 00002AH
PW15 PW14 PW13 PW12 PW11
PW10
PW09 PW08
PW07
PW06 PW05 PW04 PW03
PW02 PW01
PW00
X
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