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參數(shù)資料
| 型號： | MAX9384EWP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ECL/PECL Dual Differential 2:1 Multiplexer |
| 中文描述： | DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 235K |
| 代理商： | MAX9384EWP |
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Detailed Description
The MAX9384 dual differential 2:1 multiplexer features
extremely low propagation delay (560ps max) and output-
to-output skew (40ps max). These features make the
device ideal for clock and data multiplexing applications.
The two differential muxes are controlled individually or
simultaneously through select control inputs, SEL0, SEL1,
and COM_SEL (see Table 1). The select control inputs
are referenced to V
BB
(nominally V
CC
- 1.33V) and are
internally pulled down to V
EE
through 210k
resistors. By
default, the select inputs are low when left open.
The differential inputs D_,
D_
can be configured to
accept a single-ended signal when the unused comple-
mentary input is connected to the on-chip reference volt-
age V
BB
. The reference output voltage, pins V
BB0
and
V
BB1
, provides the input reference voltage for single-
ended operation for each mux. A single-ended input of
at least V
BB_
±95mV or a differential input of at least
95mV switches the outputs to the V
OH
and V
OL
levels
specified in the
DC Electrical Characteristics
. The maxi-
mum magnitude of the differential input from D_ to
D_
is
±3.0V. Specifications for the high and low voltages of a
differential input (V
IHD
and V
ILD
) and the differential input
voltage (V
IHD
- V
ILD
) apply simultaneously.
The device operates over a wide supply range (V
CC
-
V
EE
) of +3.0V to +5.5V for PECL or -3.0V to -5.5V for
ECL, and is pin compatible with the MC100LVEL56 and
MC100EL56.
Single-Ended Operation
A single-ended input can be driven to V
CC
and V
EE
or
by a single-ended LVPECL/LVECL signal. D_,
D_
are
differential inputs but can be configured to accept sin-
gle-ended inputs. This is accomplished by connecting
the on-chip reference voltage, V
BB_
, to an unused com-
plementary input as a reference. For example, the dif-
ferential D0a,
D0a
input is converted to a noninverting,
single-ended input by connecting V
BB0
to
D0a
and
connecting the single-ended input to D0a. Similarly, an
inverting input is obtained by connecting V
BB0
to D0a
and connecting the single-ended input to
D0a
.
When using the V
BB_
reference output, bypass it with a
0.01μF ceramic capacitor to V
CC
. If not used, leave it
open. The V
BB_
reference can source or sink 0.5mA,
which is sufficient to drive two inputs.
ECL/PECL Dual Differential 2:1 Multiplexer
8
_______________________________________________________________________________________
V
IHD
V
ILD
V
IH
V
IL
V
OH
V
OL
V
BB
D_a AND D_b
D_a AND D_b
V
IHD
- V
ILD
SEL_ WHEN COM_SEL = LOW
OR
COM_SEL WHEN SEL_ = LOW
Q_
Q_
t
PLH2
t
PHL2
V
OH
- V
OL
Figure 4. Select Inputs (COM_SEL, SEL_) to Output (Q_,
Q_
) Delay Timing Diagram
CONTROL INPUT
COM_SEL
DATA INPUT
D_ ,
D
_
b
*
a
a
SEL_
L or open
H
X
L or open
H
Table 1. Input Select Truth Table
*
Default input when COM_SEL and SEL_ are left open.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9384EWP/GG8 | 制造商:Maxim Integrated Products 功能描述: |
| MAX9384EWP/GH9 | 制造商:Maxim Integrated Products 功能描述:ECL/PECL DUAL DIFFERENTIAL 2:1 MULTIPLEXER - Rail/Tube |
| MAX9384EWP/GH9-T | 制造商:Maxim Integrated Products 功能描述:ECL/PECL DUAL DIFFERENTIAL 2:1 MULTIPLEXER - Tape and Reel |
| MAX9384EWP+ | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 4-IN LVECL/LVPECL 20SOIC - Rail/Tube |
| MAX9384EWP+T | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 4-IN LVECL/LVPECL 20SOIC - Tape and Reel |
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