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參數(shù)資料
| 型號： | MAX9384EWP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ECL/PECL Dual Differential 2:1 Multiplexer |
| 中文描述： | DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 235K |
| 代理商： | MAX9384EWP |
M
ECL/PECL Dual Differential 2:1 Multiplexer
6
_______________________________________________________________________________________
Pin Description
PIN
1
2
NAME
D0a
D0a
FUNCTION
Noninverting Differential Input
a
for MUX 0. Internal 120k
pulldown to V
EE
.
Inverting Differential Input
a
for MUX 0. Internal 120k
pulldown to V
EE
and 120k
pullup to V
CC
.
3
V
BB0
Reference Output Voltage. Connect to the inverting or noninverting clock input to provide a reference for
single-ended operation. When used, bypass V
BB0
to V
CC
with a 0.01μF ceramic capacitor. Otherwise
leave open. V
BB0
is internally connected to V
BB1.
4
5
6
7
D0b
D0b
D1a
D1a
Noninverting Differential Input
b
for MUX 0. Internal 120k
pulldown to V
EE
.
Inverting Differential Input
b
for MUX 0. Internal 120k
pulldown to V
EE
and 120k
pullup to V
CC
.
Noninverting Differential Input
a
for MUX 1. Internal 120k
pulldown to V
EE
.
Inverting Differential Input
a
for MUX 1. Internal 120k
pulldown to V
EE
and 120k
pullup to V
CC
.
8
V
BB1
Reference Output Voltage. Connect to the inverting or noninverting clock input to provide a reference for
single-ended operation. When used, bypass V
BB1
to V
CC
with a 0.01μF ceramic capacitor. Otherwise
leave open. V
BB1
is internally connected to V
BB0.
9
10
11
12
13
D1b
D1b
V
EE
Q1
Q1
Noninverting Differential Input
b
for MUX 1. Internal 120k
pulldown to V
EE
.
Inverting Differential Input
b
for MUX 1. Internal 120k
pulldown to V
EE
and 120k
pullup to V
CC
.
Negative Supply Voltage
Inverting Output for MUX 1. Typically terminate with 50
resistor to V
CC
- 2V.
Noninverting Output for MUX 1. Typically terminate with 50
resistor to V
CC
- 2V.
Positive Supply Voltage. Bypass each V
CC
to V
EE
with 0.1μF and 0.01μF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
14, 20
V
CC
15
16
17
18
19
SEL1
COM_SEL Common Select Logic Input. Internal 210k
pulldown to V
EE
.
SEL0
Select Logic Input for MUX 0. Internal 210k
pulldown to V
EE
.
Q0
Inverting Output for MUX 0. Typically terminate with 50
resistor to V
CC
- 2V.
Q0
Noninverting Output for MUX 0. Typically terminate with 50
resistor to V
CC
- 2V.
Select Logic Input for MUX 1. Internal 210k
pulldown to V
EE
.
DIFFERENTIAL INPUT VOLTAGE DEFINITION
SINGLE-ENDED INPUT VOLTAGE DEFINITION
V
IH
V
IL
V
IHD
- V
ILD
V
IHD
- V
ILD
V
CC
V
EE
V
IHD
(MAX)
V
ILD
(MAX)
V
IHD
(MIN)
V
ILD
(MIN)
V
CC
V
BB
V
EE
Figure 1. Input Definitions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9384EWP/GG8 | 制造商:Maxim Integrated Products 功能描述: |
| MAX9384EWP/GH9 | 制造商:Maxim Integrated Products 功能描述:ECL/PECL DUAL DIFFERENTIAL 2:1 MULTIPLEXER - Rail/Tube |
| MAX9384EWP/GH9-T | 制造商:Maxim Integrated Products 功能描述:ECL/PECL DUAL DIFFERENTIAL 2:1 MULTIPLEXER - Tape and Reel |
| MAX9384EWP+ | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 4-IN LVECL/LVPECL 20SOIC - Rail/Tube |
| MAX9384EWP+T | 制造商:Maxim Integrated Products 功能描述:CLOCK MLTPLXR 4-IN LVECL/LVPECL 20SOIC - Tape and Reel |
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