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參數資料
| 型號： | MAX9121EUE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 10/12頁 |
| 文件大小： | 0K |
| 描述： | IC RCVR QUAD LVDS 16-TSSOP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 接收器 |
| 驅動器/接收器數： | 0/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
received. Open or undriven terminated input conditions
can occur when a cable is disconnected or cut, or
when the LVDS driver outputs are high impedance. A
short condition can occur because of a cable failure.
The fail-safe input network (Figure 1) samples the input
common-mode voltage and compares it to VCC - 0.3V
(nominal). When the input is driven to levels specified in
the LVDS standards, the input to the common-mode
voltage is less than VCC - 0.3V and the fail-safe circuit
is not activated. If the inputs are open or if the inputs
are undriven and shorted or undriven and parallel ter-
minated, there is no input current. In this case, a pullup
resistor in the fail-safe circuit pulls both inputs above
VCC - 0.3V, activating the fail-safe circuit and forcing
the output high.
Applications Information
Power-Supply Bypassing
Bypass the VCC pin with high-frequency surface-mount
ceramic 0.1F and 0.001F capacitors in parallel as
close to the device as possible, with the smaller valued
capacitor closest to VCC.
Differential Traces
Input trace characteristics affect the performance of the
MAX9121/MAX9122. Use controlled-impedance PC
board traces to match the cable characteristic imped-
ance. The termination resistor is also matched to this
characteristic impedance.
Eliminate reflections and ensure that noise couples as
common mode by running the differential traces close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Each channel’s differential signals should be routed
close to each other to cancel their external magnetic
field. Maintain a constant distance between the differ-
ential traces to avoid discontinuities in differential
impedance. Avoid 90° turns and minimize the number
of vias to further prevent impedance discontinuities.
MAX9121/MAX9122
Quad LVDS Line Receivers with
Integrated Termination and Flow-Through Pinout
_______________________________________________________________________________________
7
IN_+
VCC - 0.3V
IN_-
OUT_
MAX9121
MAX9122
RIN2
VCC
RIN1
IN_+
VCC - 0.3V
IN_-
OUT_
RIN2
VCC
RIN1
RDIFF
RIN1
Figure 1. Input with Fail-Safe Network
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX9121EVKIT | 功能描述:LVDS 接口集成電路 Evaluation Kit for the MAX9121 MAX9122 MAX9123 RoHS:否 制造商:Texas Instruments 激勵器數量:4 接收機數量:4 數據速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| MAX9122 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout |
| MAX9122ESE | 制造商:Maxim Integrated Products 功能描述:QUAD LVDS LINE RECEIVER WITH INTEGRATED TERMI - Bulk 制造商:Rochester Electronics LLC 功能描述: |
| MAX9122ESE+ | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 4RX 16SOIC N - Bulk |
| MAX9122ESE+T | 制造商:Maxim Integrated Products 功能描述:LINE RCVR 4RX 16SOIC N - Tape and Reel |
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