參數(shù)資料
型號(hào)： MAX8632
廠商： Maxim Integrated Products, Inc.
英文描述： Quadruple 2-Input Positive-NAND Gates With Open-Drain Outputs 20-LCCC -55 to 125
中文描述： 集成DDR電源方案，適用于臺(tái)式機(jī)、筆記本電腦和圖形卡
文件頁(yè)數(shù)： 26/29頁(yè)
文件大小： 512K
代理商： MAX8632
M
thick copper PC boards (2oz vs. 1oz) can enhance
full-load efficiency by 1% or more. Correctly routing
PC board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single m
of excess trace resistance caus-
es a measurable efficiency penalty.
The LX and PGND1 connections to the low-side
MOSFET for current sensing must be made using
Kelvin-sense connections.
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor-charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
Route high-speed switching nodes (BST, LX, DH,
and DL) away from sensitive analog areas (REF, FB,
and ILIM).
Input ceramic capacitors must be placed as close
as possible to the high-side MOSFET drain and the
low-side MOSFET source. Position the MOSFETs so
the impedance between the input capacitor termi-
nals and the MOSFETs is as low as possible.
Special Layout Considerations for LDO Section
The capacitor (or capacitors) at VTT should be placed
as close to VTT and PGND2 (pins 12 and 11) as possi-
ble to minimize the series resistance/inductance of the
trace. The PGND2 side of the capacitor must be short
with a low-impedance path to the exposed pad under-
neath the IC. The exposed pad must be star-connected
to GND (pin 24) and PGND2 (pin 11). Connect PGND1
(pin 23) separately to the nearby PGND plane at the
source of the low-side MOSFET. Do not connect this
pin directly to the exposed pad as this can inject unde-
sirable switching noise into the clean analog GND.
Instead, PGND1 (pin 23) is connected to PGND2 (pin
11) by the large PGND plane. A narrower trace can be
used to connect the output voltage on the VTT side of
the capacitor back to VTTS (pin 9). For best perfor-
mance, the VTTI bypass capacitor must be placed as
close to VTTI (pin 13) as possible. REFIN (pin 14)
should be separately routed with a clean trace and
adequately bypassed to GND. Refer to the MAX8632
evaluation kit data sheet for PC board guidelines.
Integrated DDR Power-Supply Solution for
Desktops, Notebooks, and Graphic Cards
26
______________________________________________________________________________________
Figure 9. Voltage-Positioned Output
MAX8632
V
IN
R
POS
FB
OUT
PGND1
DL
DH
BST
IN
LX
GND
VOLTAGE-
POSITIONED
OUTPUT
V
DD
AV
DD
+5V BIAS
SUPPLY
相關(guān)PDF資料
PDF描述
MAX863EEE Dual, High-Efficiency, PFM, Step-Up DC-DC Controller
MAX864 Dual-Output Charge Pump with Shutdown
MAX864EEE Dual-Output Charge Pump with Shutdown
MAX865 Compact, Dual-Output Charge Pump
MAX865EUA Compact, Dual-Output Charge Pump
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX8632ETI+ 功能描述:PMIC 解決方案 DDR Power-Supply Solution RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel
MAX8632ETI+T 功能描述:PMIC 解決方案 DDR Power-Supply Solution RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel
MAX8632ETI+TGD2 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:
MAX8632EVKIT 功能描述:電源管理IC開發(fā)工具 RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V
MAX8633ELA+ 制造商:Maxim Integrated Products 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*