參數(shù)資料
型號: MAX7651CCB
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調(diào)理
英文描述: Flash Programmable 12-Bit Integrated Data-Acquisition Systems
中文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, MO-136BJ, TQFP-64
文件頁數(shù): 18/36頁
文件大?。?/td> 479K
代理商: MAX7651CCB
M
Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
18
______________________________________________________________________________________
ADDRESS RANGE
0000H
0002H
FUNCTION
NATURAL PRIORITY*
0
Reset Vector
INTERRUPT VECTORS
0003H
000AH
000BH
0012H
0013H
001AH
001BH
0022H
0023H
002AH
002BH
0032H
0033H
003AH
003BH
0042H
0043H
004AH
004BH
0052H
0053H
005AH
005BH
0062H
INT0
(external interrupt 0)
Timer 0
INT1
(external interrupt 1)
Timer 1
Serial Port 0 transmit/receive
Timer 2
Reserved
Serial Port 1 transmit/receive
Flash memory write/page erase
ADC (end of conversion)
Reserved
Reserved
1
2
3
4
5
6
7
8
9
10
11
0063H
006AH
Watchdog timer
12
Table 3. Reset and Interrupt Vector Locations
HEX
ADDRESS
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
EIP
B
EIE
ACC
EICON
PSW
T2CON
SCON1
IP
P3
IE
P2
SCON0
P1
TCON
PWMC
EEAL
EEAH
EEDAT
EESTCMD
PWPS
PWDA
PWDB
WDT
RCAP2L
ADDAT0
Reserved
VERSION
RCAP2H
ADDAT1
Reserved
Reserved
TL2
TH2
ADCON
SBUF1
Reserved
Reserved
SBUF0
EXIF
TMOD
TL0
TH0
TL1
TH1
CKCON
Reserved
80
P0
SP
DPL0
DPH0
DPL1
DPH1
DPS
PCON
Table 4. SFR Memory Organization
*Lower priority number takes precedence.
Note 1:
SFRs in column 0/8 are bit addressable. Other SFRs are not bit addressable.
Note 2:
The VERSION SFR contains the silicon ID and will change for future MAX7651/MAX7652 revisions.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
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