參數(shù)資料
型號: MAX7456
廠商: Maxim Integrated Products, Inc.
英文描述: Single-Channel Monochrome On-Screen Display with Integrated EEPROM
中文描述: 集成了EEPROM的單通道、單色隨屏顯示器
文件頁數(shù): 5/43頁
文件大?。?/td> 604K
代理商: MAX7456
M
Single-Channel Monochrome On-Screen
Display with Integrated EEPROM
_______________________________________________________________________________________
5
Note 1:
See the standard test circuits of Figure 1. R
L
= 75
, unless otherwise specified. All digital input signals are timed from a
voltage level of (V
IH
+ V
IL
) / 2. All parameters are tested at T
A
= +85°C and values through temperature range are guaran-
teed by design.
Note 2:
The input-voltage operating range is the input range over which the output signal parameters are guaranteed (Figure 3).
Note 3:
The input-voltage sync detection range is the input composite video range over which an input sync signal is properly
detected and the OSD signal appears at VOUT. However, the output voltage specifications are not guaranteed for input sig-
nals exceeding the maximum specified in the input operating voltage range (Figure 3).
TIMING CHARACTERISTICS (continued)
(V
AVDD
= +4.75V to +5.25V, V
DVDD
= +4.75V to +5.25V, V
PVDD
= +4.75V to +5.25V, T
A
= T
MIN
to T
MAX
. Typical values are at V
AVDD
= V
DVDD
= V
PVDD
= +5V, T
A
= +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
400
425
40
45
32
30
MAX
UNITS
NTSC external sync mode, Figure 4
PAL external sync mode, Figure 6
NTSC internal sync mode, Figure 5
PAL internal sync mode, Figure 7
NTSC internal sync mode, Figure 5
PAL internal sync mode, Figure 7
VOUT Sync to
VSYNC
Rising
Edge Delay
t
VOUT-VSR
ns
VSYNC
Falling Edge to VOUT
Sync Delay
t
VSF-VOUT
ns
VSYNC
Rising Edge to VOUT
Sync Delay
t
VSR-VOUT
ns
VOUT Sync to
HSYNC
Falling
Edge Delay
t
VOUT-HSF
NTSC and PAL external sync mode,
Figure 8
310
ns
VOUT Sync to
HSYNC
Rising
Edge Delay
t
VOUT-HSR
NTSC and PAL external sync mode,
Figure 8
325
ns
HSYNC
Falling Edge to VOUT
Sync Delay
t
HSF-VOUT
NTSC and PAL internal sync mode,
Figure 9
115
ns
HSYNC
Rising Edge to VOUT
Sync Delay
t
HSR-VOUT
NTSC and PAL internal sync mode,
Figure 9
115
ns
All Supplies High to
CS
Low
NVM Write Busy
t
PUD
t
NVW
Power-up delay
50
12
ms
ms
C
IN
0.1
μ
F
R
IN
75
a) INPUT TEST CIRCUIT
VIN
SAG
C
L
22pF
R
L
150
b) ONE STANDARD VIDEO LOAD, DC-COUPLED
VOUT
SIGNAL
GEN
MAX7456
MAX7456
Figure 1. Standard Test Circuits
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