參數(shù)資料
型號(hào): MAX7360ETL+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 13/32頁(yè)
文件大?。?/td> 0K
描述: IC CTRLR KEY-SW I2C 40TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 控制器
輸入類型: 邏輯
輸出類型: 邏輯
接口: I²C,2 線串口
電流 - 電源: 50µA
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(5x5)
包裝: 帶卷 (TR)
20
Maxim Integrated
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
MAX7360
Table 8. Configuration Register Format (0x01)
Table 9. Debounce Register Format (0x02)
REGISTER
BIT
DESCRIPTION
VALUE
FUNCTION
DEFAULT
VALUE
D7
Sleep
X
(when 0x40
D4 = 1)
Key-switch operating mode. Key switches always remain active
when constant-current PWM is enabled (bit 4 of register 0x40 is
high) regardless of autosleep, autowakeup, or an I2C write to this bit.
0
(when 0x40
D4 = 0)
Key-switch sleep
mode. The entire
chip is shut down.
When constant-current PWM is disabled
(bit 4 of register 0x40 is low), I2C write,
autosleep, and autowakeup all can change
this bit. This bit can be read back by I2C
any time for current status.
1
(when 0x40
D4 = 0)
Key-switch operating
mode
D6
Reserved
0
0
D5
Interrupt
0
INTK cleared when FIFO is empty
0
1
INTK cleared after host read. In this mode, I2C should read the
FIFO until interrupt condition is removed or further INT may be lost.
D4
Reserved
0
0
D3
Key-release
enable
0
Disable key releases
1
Enable key releases
D2
Reserved
0
0
D1
Autowakeup
enable
0
Disable keypress wakeup
1
Enable keypress wakeup
D0
Timeout
disable
0
I2C timeout enabled
0
1
I2C timeout disabled
REGISTER DESCRIPTION
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
PORTS ENABLE
DEBOUNCE TIME
Debounce time is 9ms
X
0
Debounce time is 10ms
X
0
1
Debounce time is 11ms
X
0
1
0
Debounce time is 12ms
X
0
1
.
Debounce time is 37ms
X
1
0
Debounce time is 38ms
X
1
0
1
Debounce time is 39ms
X
1
0
Debounce time is 40ms
X
1
GPO ports disabled (full key-scan functionality)
0
X
GPO port 7 enabled
0
1
X
GPO ports 7 and 6 enabled
0
1
0
X
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