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參數(shù)資料
| 型號： | MAX3981UTH+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XAUI QUAD EQUAL 44-TQFN |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 系列： | * |
| 應用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 44-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 44-TQFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
MAX3981
3.125Gbps XAUI Quad Cable Equalizer
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, input data rate = 3.125Gbps, TA = 0°C to +85°C. Typical values are at VCC = +3.3V and TA = +25°C, unless
otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TTL CONTROL PINS
Input High Voltage
2.0
V
Input Low Voltage
0.8
V
Input High Current
250
A
Input Low Current
500
A
Output High Voltage
Internal 10k
Ω pullup
2.4
V
Output Low Voltage
Internal 10k
Ω pullup
0.4
V
Note 1: K28.7 pattern is applied differentially at point A as shown in Figure 1.
Note 2: Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 RJ + DJ) where RJ is random RMS jitter and DJ
is maximum deterministic jitter. Signal source is a K28.5± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter
test and K28.7 (0011111000) or equivalent for the random jitter test. Residual jitter is that which remains after equalizing
media-induced losses of the environment of Figure 1 or its equivalent. The deterministic jitter at point B must be from media-
induced loss and not from clock source modulation. Jitter is measured at 0V at point C of Figure 1.
Note 3: Using K28.7 (0011111000) pattern.
Note 4: AC specifications are guaranteed by design and characterization.
OUT
IN
SMA
CONNECTOR
SMA
CONNECTOR
A
B
C
SIGNAL
SOURCE
MADISON #14487, 100
Ω
SHIELDED TWISTED PAIR
2"
≤ 10 FEET
FR4
CABLE
FR4
MAX3981
Figure 1. Test Conditions Referenced in the Electrical Characteristics Table
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