- 您現(xiàn)在的位置：買賣IC網 > PDF目錄1940 > MAX3890ECB+TD (Maxim Integrated Products)IC 16:1 SERIALIZER 64-TQFP-EP PDF資料下載
參數(shù)資料
| 型號： | MAX3890ECB+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 16:1 SERIALIZER 64-TQFP-EP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 750 |
| 功能： | 串行器 |
| 數(shù)據(jù)速率： | 2.5Gbps |
| 輸入類型： | LVDS |
| 輸出類型： | PECL |
| 輸入數(shù)： | 16 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-TQFP 裸露焊盤 |
| 供應商設備封裝： | 64-TQFP-EP（10x10） |
| 包裝： | 帶卷 (TR) |
MAX3890
+3.3V, 2.5Gbps, SDH/SONET 16:1 Serializer
with Clock Synthesis and LVDS Inputs
_______________________________________________________________________________________
7
Low-Voltage Differential-Signal
Inputs and Outputs
The MAX3890 has LVDS inputs and outputs for inter-
facing with high-speed digital circuitry. The LVDS
standard is based on the IEEE 1596.3 LVDS specifi-
cation. This technology uses 250mV to 400mV differ-
ential low-voltage swings to achieve fast transition
times, minimized power dissipation, and noise immu-
nity.
For proper operation, the parallel clock LVDS outputs
(PCLKO+, PCLKO-) require 100
differential DC termi-
nation between the inverting and noninverting outputs.
Do not terminate these outputs to ground.
The parallel data and parallel clock LVDS inputs
(PDI_+, PDI_-, PCLKI+, PCLKI-, RCLK+, RCLK-) are
internally terminated with 100
differential input resis-
tance, and therefore do not require external termina-
tion.
PECL Outputs
The serial-data PECL outputs (SDO+, SDO-, SCLKO+,
SCLKO-) require 50
DC termination to (VCC - 2V) (see
the Alternative PECL-Output Termination section).
Current-Mode Logic Outputs
The system loopback outputs (SLBO+, SLBO-) of the
MAX3890 are designed using CML. The configuration
of the MAX3890 current-mode logic (CML) output cir-
cuit includes internal 50
back termination to VCC
(Figure 3). These outputs are intended to drive a 50
transmission line terminated with a matched load
impedance.
tSKEW
SERIAL
OUTPUT DATA
(SDO)
NOTE: SIGNALS SHOWN ARE DIFFERENTIAL. FOR EXAMPLE, PCLKO = (PCLKO+) - (PCLKO-).
*PDI 15 = D15; PDI14 = D14; ...PDI0 = D0.
THIS FIGURE IS NOT INTENDED TO SHOW A SPECIFIC TIMING RELATIONSHIP BETWEEN PARALLEL
INPUT DATA AND SERIAL OUTPUT DATA.
PARALLEL
INPUT DATA
(PDI_)
VALID PARALLEL DATA*
PCLKI
PCLKO
tSU
tH
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D10
D11
D12
D13
D14
*D15
Figure 2. Timing Diagram
相關PDF資料 |
PDF描述 |
|---|---|
| MAX3892ETH+T | IC 4:1 SERIALIZER SONET 44-TQFN |
| MAX392ESE | IC SWITCH QUAD SPST 16SOIC |
| MAX3941ETG+T | IC EAM DRIVER 10GBPS 24-TQFN |
| MAX3942ETG+T | IC MODULATOR DRVR 10GBPS 24-TQFN |
| MAX394EAP | IC SWITCH QUAD SPDT 20SSOP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3890EVKIT | 制造商:Maxim Integrated Products 功能描述:+3.3V, 2.5GBPS, SDH SONET 16:1 SERIALIZER WIT - Bulk 制造商:Maxim Integrated Products 功能描述:Interface Development Tools MAX3890EVKIT |
| MAX3891ECB | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX3891ECB+D | 功能描述:串行器/解串器 - Serdes Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3891ECB+TD | 功能描述:串行器/解串器 - Serdes Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX3891ECB-D | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
發(fā)布緊急采購，3分鐘左右您將得到回復。