- 鎮ㄧ従鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗2009 > MAX3886ETN+T (Maxim Integrated Products)IC MULTIRATE CDR SER/DES56-TQFN PDF璩囨枡涓嬭級
鍙冩暩璩囨枡
| 鍨嬭櫉锛� | MAX3886ETN+T |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩锛� | 8/17闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MULTIRATE CDR SER/DES56-TQFN |
| 妯欐簴鍖呰锛� | 2,500 |
| 椤炲瀷锛� | 鏅傞悩鍜屾暩鎿氭仮寰╋紙CDR锛�锛屽璺京鐢ㄥ櫒 |
| PLL锛� | 鏄� |
| 涓昏鐩殑锛� | 鍏夌簴缍茬怠绲傜锛圤NT锛夋噳鐢�锛屽崈鍏嗕綅鐒℃簮鍏夌簴缍茬怠锛圙PON锛夛紝瀵付鐒℃簮鍏夌簴缍茬怠锛圔PON锛� |
| 杓稿叆锛� | CML锛孡VDS锛孡VPECL |
| 杓稿嚭锛� | CML锛孡VDS |
| 闆昏矾鏁革細 | 1 |
| 姣旂巼 - 杓稿叆:杓稿嚭锛� | 7:6 |
| 宸垎 - 杓稿叆:杓稿嚭锛� | 鏄�/鏄� |
| 闋荤巼 - 鏈€澶э細 | 622MHz锛�2488Mbps |
| 闆绘簮闆诲锛� | 3 V ~ 3.6 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 56-WFQFN 瑁搁湶鐒婄洡 |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 56-TQFN-EP锛�8x8锛� |
| 鍖呰锛� | 甯跺嵎 (TR) |
MAX3886
Power Supply and Ground Connection
The MAX3886 has six VCC connection pads, and instal-
lation of a bypass capacitor at each VCC pad is recom-
mended. All six VCC connections should be driven from
the same source to eliminate the possibility of indepen-
dent power-supply sequencing. Pin 53 provides current
directly to the internal VCO stage; excessive supply
noise at this node can result in increased jitter.
The 56-pin TQFN package features an exposed pad
(EP) that provides a low resistance thermal path for
heat removal from the IC and must be connected to the
circuit board ground plane for proper operation. The EP
also provides essential electrical ground connectivity.
Multirate CDR with Integrated Serializer/Deserializer
for GPON and BPON ONT Applications
16
______________________________________________________________________________________
TOP VIEW
MAX3886
THIN QFN
(8mm
脳 8mm 脳 0.8mm)
15
17
16
18
19
20
21
22
23
24
25
26
27
28
GND
PCKI+
PCKI-
PDI3+
PDI3-
PDI2+
PDI2-
PDI1+
PDI1-
PDI0+
PDI0-
BENI+
BENI-
VCC
GND
TP4
CFIL
VCC
LOCK
MVCO
MSYM
MDDR
RFCK1
RFCK2
VCC
FRST
FERR
GND
48
47
46
45
44
43
54
53
56
55
52
51
50
49
1
2
3
4
5
6
7
8
9
10
11 121314
42 41 40 39 38 37 36 35 34 33 32 31 30 29
V
CC
TP3
GND
SDO+
SDO-
TP2
BENO+
BENO-
V
CC
SDI-
SDI+
V
CC
TP1
GND
RCKO-
RCKO+
GND
PDO3+
PDO3-
PDO2+
PDO2-
PDO1+
PDO1-
PDO0+
PDO0-
PCKO+
PCKO-
GND
+
EP*
* THE EXPOSED PAD OF THE THIN QFN PACKAGE MUST BE SOLDERED TO GROUND FOR PROPER
THERMAL AND ELECTRICAL OPERATION.
Pin Configuration
鐩搁棞PDF璩囨枡 |
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|---|---|
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| MAX504EPD+ | IC DAC 10BIT 5V LP SER 14-DIP |
| MAX507AENG+ | IC DAC 12BIT W/REF 24-DIP |
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鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
|---|---|
| MAX388C/D | 鍔熻兘鎻忚堪:澶氳矾鍣ㄩ枊闂� IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:1 闁嬮棞鏁搁噺:4 闁嬪暉闆婚樆锛堟渶澶у€硷級:7 Ohms 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂滈枆鏅傞枔锛堟渶澶у€硷級: 鍌虫挱寤堕伈鏅傞枔:0.25 ns 宸ヤ綔闆绘簮闆诲:2.3 V to 3.6 V 宸ヤ綔闆绘簮闆绘祦: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:UQFN-16 |
| MAX388CJN | 鍔熻兘鎻忚堪:澶氳矾鍣ㄩ枊闂� IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:1 闁嬮棞鏁搁噺:4 闁嬪暉闆婚樆锛堟渶澶у€硷級:7 Ohms 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂滈枆鏅傞枔锛堟渶澶у€硷級: 鍌虫挱寤堕伈鏅傞枔:0.25 ns 宸ヤ綔闆绘簮闆诲:2.3 V to 3.6 V 宸ヤ綔闆绘簮闆绘祦: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:UQFN-16 |
| MAX388CPN | 鍔熻兘鎻忚堪:澶氳矾鍣ㄩ枊闂� IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:1 闁嬮棞鏁搁噺:4 闁嬪暉闆婚樆锛堟渶澶у€硷級:7 Ohms 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂滈枆鏅傞枔锛堟渶澶у€硷級: 鍌虫挱寤堕伈鏅傞枔:0.25 ns 宸ヤ綔闆绘簮闆诲:2.3 V to 3.6 V 宸ヤ綔闆绘簮闆绘祦: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:UQFN-16 |
| MAX388CPN+ | 鍔熻兘鎻忚堪:澶氳矾鍣ㄩ枊闂� IC 8:1 8Ch Fault Prtcd Analog MUX RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:1 闁嬮棞鏁搁噺:4 闁嬪暉闆婚樆锛堟渶澶у€硷級:7 Ohms 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂滈枆鏅傞枔锛堟渶澶у€硷級: 鍌虫挱寤堕伈鏅傞枔:0.25 ns 宸ヤ綔闆绘簮闆诲:2.3 V to 3.6 V 宸ヤ綔闆绘簮闆绘祦: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:UQFN-16 |
| MAX388CWG | 鍔熻兘鎻忚堪:澶氳矾鍣ㄩ枊闂� IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁搁噺:1 闁嬮棞鏁搁噺:4 闁嬪暉闆婚樆锛堟渶澶у€硷級:7 Ohms 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂滈枆鏅傞枔锛堟渶澶у€硷級: 鍌虫挱寤堕伈鏅傞枔:0.25 ns 宸ヤ綔闆绘簮闆诲:2.3 V to 3.6 V 宸ヤ綔闆绘簮闆绘祦: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:UQFN-16 |
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