參數(shù)資料
型號: MAX3766EEP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 其它接口
英文描述: 622Mbps LAN/WAN Laser Driver with Automatic Power Control and Safety Shutdown
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO20
封裝: 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-20
文件頁數(shù): 9/20頁
文件大?。?/td> 250K
代理商: MAX3766EEP
Automatic Power Control
Transmitters employing a laser with monitor photodiode
can use the APC circuit to maintain constant power,
regardless of laser threshold changes due to temperature
and aging. The APC circuit consists of the POWERSET
current mirror and the monitor diode amplifier.
The POWERSET current mirror provides an accurate
method of programming the back facet monitor photo-
diode current, which is assumed to be proportional to
laser output power. An external resistor from REF1 to
POWERSET programs the current in the unity-gain cur-
rent mirror. R
POWERSET
can be estimated as follows:
= 1.55V
POWERSET
The monitor-diode amplifier senses the current from the
monitor photodiode at MD, provides gain, and adjusts
the laser bias programming current (I
LBP
). The monitor-
diode amplifier forces the monitor-diode current to
equal the current programmed at POWERSET. The
monitor-diode amplifier can reduce the laser bias pro-
gramming current, but cannot increase it. Therefore,
the APC circuit can adjust laser bias current between 0
and the setting determined by R
BIASMAX
.
When the APC feedback loop is closed, the voltage at
MD is approximately 2V below V
CC
. If the loop cannot
close due to excess or insufficient photocurrent, a fail-
ure is detected by the failure-detection circuit. Internal
circuitry prevents the voltage at MD from dropping
below V
CC
- 3.2V.
The stability and time constant of the APC feedback
loop is determined by an external compensation
capacitor (C
MD
) of at least 0.1μF. Connect the com-
pensation capacitor from V
CC
to MD, as shown in
Typical Application Circuits, to ensure a smooth start-
up at power-on or transmitter enable.
If a monitor diode is not available, the APC feature can
be disabled by connecting R
POWERSET
to GND and
leaving MD unconnected.
Failure Detec tion
Figure 3 shows a simplified schematic of the failure-
detection circuit. The failure-detection circuit senses
two conditions. First, if the APC control loop cannot
control the monitor current due to laser undercurrent,
overcurrent, or a fault condition, a window comparator
detects that V
MD
is above or below V
CC
- 2V and
asserts the failure signal. Second, if REF1 is shorted to
the positive supply (or any another voltage above the
normal operating level), a comparator detects this con-
dition and asserts the failure signal. If left undetected,
the reference voltage would rise, the current at POWER-
SET would increase, and the APC loop would attempt to
add laser current beyond the intended value.
Either failure condition causes the
FAIL
output to assert
TTL low. The
FAIL
output buffer is an open-collector
output and is designed to operate with a 5.1k
external
pull-up resistor.
S afety/S tart-Up Circ uit
The safety circuit includes the digital logic needed to
provide a latched internal shutdown signal (SHDN) for
disabling the laser if a failure condition exists. The
MAX3766 produces less than 20μA of total laser cur-
rent when disabled by safety features or by the
ENABLE input. Figure 4 is a simplified schematic of the
safety circuit.
If ENABLE is low or open, the laser bias and modula-
tion outputs are disabled by SHDN, regardless of the
state of the safety logic. The TTL-compatible ENABLE
input is internally pulled low with a 100k
resistor.
There are two useful safety configurations: failure
indication and latched shutdown.
Failure-Indication Configuration
Select the failure-indication configuration by connecting
SAFETY to ground. In this configuration, a failure condi-
tion is reported at
FAIL
, but does not cause a latched
shutdown. This configuration requires no additional cir-
cuitry for start-up.
R
I
MOD
300
M
622Mbps LAN/WAN Laser Driver with
Automatic Power Control and S afety S hutdown
_______________________________________________________________________________________
9
V
MD
FAILURE
(INTERNAL)
200mV
200mV
2V
V
CC
0.5V
V
REF1
V
BANDGAP
Figure 3. Failure-Detection Circuit (Simplified)
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