參數(shù)資料
型號: MAX3766EEP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 其它接口
英文描述: 622Mbps LAN/WAN Laser Driver with Automatic Power Control and Safety Shutdown
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO20
封裝: 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-20
文件頁數(shù): 7/20頁
文件大?。?/td> 250K
代理商: MAX3766EEP
M
622Mbps LAN/WAN Laser Driver with
Automatic Power Control and S afety S hutdown
_______________________________________________________________________________________
7
_______________Detailed Desc ription
Figure 2 is a functional block diagram of the MAX3766
laser driver. The major functional blocks are the refer-
ence generator, PECL input buffer, laser-bias circuit,
modulation-current driver, automatic power control
(APC), failure detection, and safety circuit.
Referenc e Generator
The MAX3766 provides adjustments for maximum
laser-bias current, laser modulation current, and aver-
age laser power. To program these adjustments, simply
use the currents obtained by inserting a resistor in
series with integrated voltage references REF1 and
REF2. The temperature coefficient (tempco) of REF1
compensates for the tempco of the bias, modulation,
and APC current mirrors. Therefore, a programming
current derived from REF1 is constant with tempera-
ture. REF2 provides a positive tempco, which can be
applied to the modulation current. A positive modula-
tion-current tempco will compensate for the thermal
characteristics of typical laser diodes. The modulation-
current tempco is programmed by an external resistor
(R
TC
), which is connected from REF1 to TC. R
TC
and
an internal 2k
resistor form a weighted sum of the
temperature-compensated reference (REF1) and the
temperature-increasing reference, which is buffered
and output at REF2. REF1 and REF2 are stable with no
bypass capacitance. Bypass filtering REF1 or REF2 is
not required.
PECL Input Buffer
The differential PECL input signals are connected to the
high-speed PECL input buffer at IN+ and IN-. The input
impedance at IN+ and IN- is greater than 100k
, and
the input bias current is less than 10μA. The
MAX3766’s data inputs are not self-biasing. The com-
mon-mode input should be set by the external PECL
termination circuitry. To obtain good AC performance,
inputs should always be greater than 2.2V and less
than V
CC
.
Laser Modulation-Current Driver
The laser modulation-current driver consists of a cur-
rent mirror and an emitter coupled pair. The mirror has
a gain of +30mA/mA. Modulation-current amplitude is
programmed with external resistor R
MOD
connected
from REF2 to MOD. R
MOD
can be estimated as follows:
with R
TC
= 0
.
The MAX3766 AC output drives up to 60mA of laser
current. Pulse-width distortion and overshoot are lowest
between 30mA and 60mA. However, output edge
speed increases at lower currents. When the output
current is between 2mA and 60mA, the edge speed is
suitable for communications up to 622Mbps. Edge
speeds below 30mA are suitable for communications up
to 1.25Gbps (see Typical Operating Characteristics).
The modulation-current tempco can be programmed
with an external resistor R
TC
, as described in the
Reference Generator section. An internal 520
resistor
is included to limit the maximum modulation current if
MOD is connected directly to REF2.
If the MAX3766 is shut down or disabled, the modula-
tion programming current is shunted to ground. Any
remaining modulation current is switched to OUT-.
For optimum performance, the voltage at OUT+ and
OUT- must always exceed V
CC
- 2.5V.
Laser Bias Circ uit
The laser bias circuit is a current mirror with a gain of
+40mA/mA. Redundant controls disable the bias current
during a shutdown or disable event: the programming
current is switched off, and any remaining bias output
current is switched away from the laser. Ensure that the
voltage at BIAS always remains above V
CC
- 2.5V. If the
bias circuit is not used, connect BIAS to V
CC
.
R
=
1.55V 30
I
MOD
MOD
( )
520
V
IN+
VOLTS
250mV MIN
900mV MAX
500mV MIN
1800mV MAX
500mV MIN
1800mV MAX
I
MOD
I
OUT+
TIME
V
IN-
V
IN-
V
IN+
- V
IN-
V
IN+
RESULTING SIGNAL
SINGLE-ENDED INPUT
DIFFERENTIAL INPUT
Figure 1. Required Input Signal and Output Polarity
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