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參數(shù)資料
| 型號： | MAX3676 |
| 廠商： | Maxim Integrated Products, Inc. |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| 中文描述： | 622Mbps、3.3V時(shí)鐘恢復(fù)與數(shù)據(jù)再定時(shí)IC，帶有限幅放大器 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 181K |
| 代理商： | MAX3676 |
M
622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
10
______________________________________________________________________________________
Note that the LOL monitor is only valid when a data
stream is present on the inputs to the MAX3676. As a
result, LOL does not detect a loss-of-power condition
resulting from a loss of the incoming signal. See the
Loss-of-Power Monitor section for this type of indicator.
Input and Output Terminations
The MAX3676 digital data and clock I/Os (DDI+, DDI-,
SDO+, SDO-, SCLK+, and SCLK-) are designed to
interface with PECL signal levels. It is important to bias
these ports appropriately. A circuit that provides a
Thevenin equivalent of 50
to V
CC
- 2V should be used
with fixed-impedance transmission lines for proper ter-
mination. Make sure that the differential outputs have
balanced loads.
The digital data input signals (DDI+ and DDI-) are dif-
ferential inputs to an emitter-coupled pair. As a result,
the MAX3676 can accept differential input signals as
low as 250mV. These inputs can also be driven single-
ended by externally biasing DDI- to the center of the
voltage swing.
The MAX3676’s performance can be greatly affected
by circuit board layout and design. Use good high-fre-
quency design techniques, including minimizing
ground inductance and using fixed-impedance trans-
mission lines on the data and clock signals. Power-sup-
ply decoupling should be placed as close to V
CC
as
possible. Take care to isolate the input from the output
signals to reduce feedthrough.
__________Applications Information
Driving the Limiting Amplifier
Single-Ended
There are three important requirements for driving the
limiting amplifier from a single-ended source (Figure 5):
1) There must be no DC-coupling to the ADI+ and ADI-
inputs. DC levels at these inputs disrupt the offset-
correction loop.
2) The terminating resistor R
T
(50
) must be referenced
to the ADI- input to minimize common-mode coupling
problems.
3) The low-frequency cutoff for the limiting amplifier
is determined by either C
IN
and the 2.5k
input
impedance or C
b
/2 together with R
T
. With C
b
= 0.22μF
and R
T
= 50
,
the low-frequency cutoff is 29kHz.
ACQUIRE
NO DATA
LOP
O
LOCKED
TIME
LOL
Figure 4. Loss-of-Lock Output
C
IN
5.6nF
C
b
0.22
μ
F
C
b
0.22
μ
F
R
T
50
2.5k
ADI+
ADI-
MAX3676
Figure 5. Single-Ended Input Termination
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3676E/D | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3676E/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3676E/D+ | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3676EHJ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 622Mbps 3.3V Clock Recovery RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3676EHJ+ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 622Mbps 3.3V Clock Recovery RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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